Author Topic: what core type to use for SMPS  (Read 634 times)

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Offline Hiemal

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what core type to use for SMPS
« on: May 08, 2019, 06:53:01 am »
Designing a buck boost converter and trying to figure out what core type to use.

I have some ferrite ETD cores made of N87 material (http://static6.arrow.com/aropdfconversion/a9ab4ea59bcd9f7c75538730d5f24721fd40243e/2789680714527620etd_49_25_16.pdf)

Two of the ferrite cores have spacing 2 mm, the other two have 0.2 mm.


 and several toroidal cores made of Kool-mu (https://www.mag-inc.com/Media/Magnetics/Datasheets/0077438A7.pdf). They're big.



Which would be better to use for this? The Kool-mu cores have more loss, but have a distributed air gap and should saturate less easily.


The buck boost converter will have an input of 12 volts, and output anywhere from 0 to 30 volts at 10 amps. Which means, at 30 volts and 10 amps it should have a peak inductor current of about 30 amps (given efficiency losses and whatnot)...

The main IC of the buck/boost will be an LM5175... which can be set to anywhere between 100 kHz to 600 kHz.



« Last Edit: May 08, 2019, 07:06:52 am by Hiemal »
 

Offline Hiemal

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Re: what core type to use for SMPS
« Reply #1 on: May 09, 2019, 12:26:46 am »
I apologize for bumping this so soon, but I'm curious to know what ya'll think.

I can obviously combine the two spacing varieties of ferrite too.

I've been told to avoid the Kool-mu toroid since the material is quite lossy compared to ferrite, but again want to know if it's something I should be concerned about or not.
 

Offline T3sl4co1l

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Re: what core type to use for SMPS
« Reply #2 on: May 09, 2019, 08:38:19 am »
Probably any of them is suitable.

Do you have any idea yet, how much inductance will be required, based on your choice of core and controller?

The Kool-Mu may be on the lossy side, if it's a higher-mu variety.  That would suggest a higher inductance, and an average-current-mode controller.  You can put some turns on it to test, and look up the A_L and size in the datasheet to confirm its properties.

The 2mm gap is quite large, implying low mu_avg and a high ripple fraction, suitable for a peak-current-mode controller.

The 0.2mm gap is probably not enough for the required current, but you can always add more.

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Offline Hiemal

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Re: what core type to use for SMPS
« Reply #3 on: May 09, 2019, 09:35:42 am »
Inductance required for this should be about 10 uH from what the web-bench designer suggests. The value doesn't necessarily need be precise and has a lot of wiggle room.

The Kool-mu core has an A_L of 281, and a u of 125.

"The LM5175 regulates the output using valley current mode control in buck mode and peak current mode control in boost mode." straight from the datasheet.

And I could combine the two gaps to get a middle man if you think that would work better than the Kool-mu.
 

Offline MagicSmoker

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Re: what core type to use for SMPS
« Reply #4 on: May 09, 2019, 10:58:28 am »
I apologize for bumping this so soon, but I'm curious to know what ya'll think.

You didn't give nearly enough information to even begin to help you which is why no one bothered replying. At least do some of the preliminary design work rather than just stating you have 3 different core sets and asking if they are appropriate for a buck boost converter delivering 0-30V at up to 10A. I mean, really - what kind of half-assed design spec is that?

That out of the way, Kool Mu material is way too lossy for use at 100kHz if exposed to significant AC flux swing, which is bound to occur at some combination of input vs. output voltage and load current with a peak current-mode control scheme. You could design the buck-boost (aka "non-isolated flyback") converter to stay in continuous conduction mode (CCM) over most of the operating range, but that combination of topology and operating mode is notoriously difficult to stabilize.

Note that datasheets for gapped ferrite cores give AL values assume the use of one gapped and one ungapped core half; using two gapped halves generally cuts the AL value in half. As Tim already mentioned, a 2mm gap is quite extreme, and as has yet to be mentioned, an ETD49 core would be massively oversized for this application even at 50kHz, much less 100kHz or higher. Still, using a bigger core than necessary doesn't really hurt, and can help quite a bit in fact as fewer turns for each winding for the same flux swing will be needed.

And for the really useful part of this post, I highly recommend the below web site to people starting off in SMPS design as it does a creditable job of selecting core and winding parameters given input/output voltage, output current and switching frequency. It defaults to solving for operation at the boundary between discontinuous and continuous conduction modes which is a reasonable place to start, though you'll likely want to lower the inductance value to force operation in discontinuous mode with a flyback/buck-boost.

http://schmidt-walter-schaltnetzteile.de/smps_e/smps_e.html


EDIT - I plugged your sketchy parameters into the above site - 12V in, -30V @ 10A out, 100kHz - and an ETD 49 core with a 2mm gap was one of the recommendations it spat out, saying just 6 turns would be needed. Like I said, massively oversized for the job!
« Last Edit: May 09, 2019, 11:02:53 am by MagicSmoker »
 

Offline Hiemal

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Re: what core type to use for SMPS
« Reply #5 on: May 09, 2019, 10:42:39 pm »
I apologize for bumping this so soon, but I'm curious to know what ya'll think.

You didn't give nearly enough information to even begin to help you which is why no one bothered replying. At least do some of the preliminary design work rather than just stating you have 3 different core sets and asking if they are appropriate for a buck boost converter delivering 0-30V at up to 10A. I mean, really - what kind of half-assed design spec is that?

That out of the way, Kool Mu material is way too lossy for use at 100kHz if exposed to significant AC flux swing, which is bound to occur at some combination of input vs. output voltage and load current with a peak current-mode control scheme. You could design the buck-boost (aka "non-isolated flyback") converter to stay in continuous conduction mode (CCM) over most of the operating range, but that combination of topology and operating mode is notoriously difficult to stabilize.

Note that datasheets for gapped ferrite cores give AL values assume the use of one gapped and one ungapped core half; using two gapped halves generally cuts the AL value in half. As Tim already mentioned, a 2mm gap is quite extreme, and as has yet to be mentioned, an ETD49 core would be massively oversized for this application even at 50kHz, much less 100kHz or higher. Still, using a bigger core than necessary doesn't really hurt, and can help quite a bit in fact as fewer turns for each winding for the same flux swing will be needed.

And for the really useful part of this post, I highly recommend the below web site to people starting off in SMPS design as it does a creditable job of selecting core and winding parameters given input/output voltage, output current and switching frequency. It defaults to solving for operation at the boundary between discontinuous and continuous conduction modes which is a reasonable place to start, though you'll likely want to lower the inductance value to force operation in discontinuous mode with a flyback/buck-boost.

http://schmidt-walter-schaltnetzteile.de/smps_e/smps_e.html


EDIT - I plugged your sketchy parameters into the above site - 12V in, -30V @ 10A out, 100kHz - and an ETD 49 core with a 2mm gap was one of the recommendations it spat out, saying just 6 turns would be needed. Like I said, massively oversized for the job!


I apologize for not stating more information; I'm mostly self teaching myself this stuff as I go along so I wasn't sure what stuff I should include...

To add more info;

It's an LM5175; the LM5175 is a 4 switch synchronous buck boost converter with a positive voltage output. I can vary the frequency anywhere from 100 khz to 600 khz depending on what would be more ideal. From my understanding a higher frequency means smaller inductances and smaller capacitances are required, but you lose more power in switching losses for obvious reasons. I was thinking to go with roughly 300 khz, right in the middle to balance the two out.

The controller also has the option to do DCM or CCM, with a hiccup option for lighter loads. CCM seems to be the better choice but given that my design can vary widely with load, which do you think would be a better option?

What other additional information would be helpful? Again, I apologize, I'm learning as I go along with this.
 

Offline MagicSmoker

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Re: what core type to use for SMPS
« Reply #6 on: May 10, 2019, 11:21:11 am »
...
It's an LM5175; the LM5175 is a 4 switch synchronous buck boost converter with a positive voltage output.

Okay, stop right there. I was not familiar with this IC (if you design SMPSs long enough you'll learn to avoid highly specialized ICs like this) and ASSumed your referring to it as a buck-boost controller/converter* IC was accurate; in fact, it actually operates as a buck OR boost controller IC, seamlessly switching between the two topologies by selecting the appropriate pair of switches out of an H-bridge surrounding the energy storage choke (aka inductor).

Compensating such a converter is a nightmare** because the boost and buck topologies have very different transfer functions and making the output voltage adjustable over a wide range only adds to the misery (especially in boost mode). A much simpler approach would be - somewhat ironically - to use two separate converters: a boost to deliver a roughly constant 32-36V from the 12V nominal input, followed by a buck that can more easily be made to deliver an adjustable output, even in the face of wildly varying load current. Another advantage is that the boost converter does not have any ability to limit output current in the event of a short, whereas a buck does. Finally, separate converters are easier to troubleshoot and will teach you more about SMPSs in general.

One hint on frequency compensation: Nyquist/Bode stability generally requires that in a cascaded converter the first/earlier converter has a higher loop bandwidth than subsequent converters in the chain, but this is difficult to achieve when the first converter is a boost for reasons which are too tedious to explain in a quick forum post, so an alternate route - one employed by every power supply with a PFC front end, in fact - is to radically reduce the loop bandwidth of the boost stage and simply have it deliver a few more volts than is strictly necessary for the subsequent stage to effectively regulate. This is likely unavoidable as the boost converter becomes increasingly difficult to stabilize when the ratio of output voltage to input voltage exceeds 2, anyway, whereas the buck is basically the easiest converter to stabilize of them all.

I can vary the frequency anywhere from 100 khz to 600 khz depending on what would be more ideal. From my understanding a higher frequency means smaller inductances and smaller capacitances are required, but you lose more power in switching losses for obvious reasons.

Your understanding that higher frequency means smaller inductances and capacitances is correct, but lower frequency is always better for those new to SMPS design because the inevitable stray/parasitic Ls and Cs are less of a concern. So definitely stick to 100kHz, or whatever minimum this IC will let you get away with (I did not read the entire datasheet).

The controller also has the option to do DCM or CCM, with a hiccup option for lighter loads. CCM seems to be the better choice but given that my design can vary widely with load, which do you think would be a better option?

Well, this is a choice between two equally bad options, really. Switching between CCM and DCM (by turning off the MOSFET being used as a synchronous rectifier so only its body diode performs the rectification function) grossly affects the transfer function, adding even more misery already heaped into an ever-growing pile, but hiccup mode effectively runs the converter in "bang-bang" or hysteresis mode but with a generally much wider than usually tolerable error band, so output voltage regulation is quite poor. I honestly can't say which would be less bad - you'd have to try them yourself, but see above.


* - a rather informal distinction, but controller ICs typically require external switches while converter ICs have the switch(es) built in.
** - the usual solution - particularly for those new to SMPS design - is to simply roll off the loop bandwidth really early; like <300Hz for a 100kHz converter.
 

Offline OwO

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Re: what core type to use for SMPS
« Reply #7 on: May 10, 2019, 02:29:39 pm »
A much simpler approach would be - somewhat ironically - to use two separate converters: a boost to deliver a roughly constant 32-36V from the 12V nominal input, followed by a buck that can more easily be made to deliver an adjustable output, even in the face of wildly varying load current. Another advantage is that the boost converter does not have any ability to limit output current in the event of a short, whereas a buck does. Finally, separate converters are easier to troubleshoot and will teach you more about SMPSs in general.

One hint on frequency compensation: Nyquist/Bode stability generally requires that in a cascaded converter the first/earlier converter has a higher loop bandwidth than subsequent converters in the chain, but this is difficult to achieve when the first converter is a boost for reasons which are too tedious to explain in a quick forum post, so an alternate route - one employed by every power supply with a PFC front end, in fact - is to radically reduce the loop bandwidth of the boost stage and simply have it deliver a few more volts than is strictly necessary for the subsequent stage to effectively regulate. This is likely unavoidable as the boost converter becomes increasingly difficult to stabilize when the ratio of output voltage to input voltage exceeds 2, anyway, whereas the buck is basically the easiest converter to stabilize of them all.
If wide output range is a requirement (Vout < Vin and Vout > Vin) then a Cuk converter might be a good option.
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Offline Hiemal

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Re: what core type to use for SMPS
« Reply #8 on: May 11, 2019, 09:12:12 am »
I actually misread part of the datasheet because I'm boo boo the fool...

DCM and CCM and hiccup mode are all separate entities from one another; you can effectively choose to have DCM or CCM, with or without hiccup mode enabled.

Hiccup mode is also not a light load option; it's used in the event of an overload condition, to prevent the controller from destroying the output switches by "hiccuping" (stopping) the output for 128 cycles, instead of the alternative where it uses cycle-by-cycle current limiting by skipping individual cycles.

For compensation/stabilization, the datasheet says it has something called a GM error amplifier (is this just a regular error amplifier with a fancy prefix?) to be used with type II compensation for frequency compensation, and a separate error amplifier for slope compensation.


Additionally, I can use their webbench software to design a power supply and it calculates all of the component values as required given certain constants like input and output voltage, and current... Would it be a good idea to cycle through the various outputs and see what values it suggests, and then use which is the most "restrictive" of them, if that makes sense?


And going back to the original question then, at 100 kHz the Kool-mu cores are definitely not good to use and I should probably stick to the ferrite, yes?
« Last Edit: May 11, 2019, 09:16:02 am by Hiemal »
 

Offline MagicSmoker

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Re: what core type to use for SMPS
« Reply #9 on: May 11, 2019, 10:19:37 am »
...Hiccup mode is also not a light load option; it's used in the event of an overload condition, to prevent the controller from destroying the output switches by "hiccuping" (stopping) the output for 128 cycles, instead of the alternative where it uses cycle-by-cycle current limiting by skipping individual cycles.

Hiccup mode can be used at either end of the load scale (ie - from light to over), but it is no substitute for cycle-by-cycle current limiting.

For compensation/stabilization, the datasheet says it has something called a GM error amplifier (is this just a regular error amplifier with a fancy prefix?) to be used with type II compensation for frequency compensation, and a separate error amplifier for slope compensation.

Gm = transconductance - it's just a different type of error amplifier (voltage in, current out); there's nothing fancy or special about it. Type II compensation means the feedback network consists of an integrator capacitor with an additional RC network across it to flatten out the gain in the mid-band frequencies. Type II compensation seems to be the most commonly used, even when it shouldn't be, probably because most people don't provoke (ie - test) their designs sufficiently to uncover stability problems... but I digress. Anyway, slope compensation is used to cure the subharmonic (aka "alternate cycle") oscillation that occurs in current-mode control when the inductance is high and/or duty cycle exceeds 50%.

Additionally, I can use their webbench software to design a power supply and it calculates all of the component values as required given certain constants like input and output voltage, and current... Would it be a good idea to cycle through the various outputs and see what values it suggests, and then use which is the most "restrictive" of them, if that makes sense?

I've never used Webbench to actually design something, but I hear it does is pretty decent job. Like most simulators, however, it is very much a case of Garbage In = Garbage Out, and in this case the biggest steaming pile of garbage is that you want a variable output, and these "cheater" programs tend to assume the world is a benign place where inputs are stable voltage sources and loads are fixed resistances.

And going back to the original question then, at 100 kHz the Kool-mu cores are definitely not good to use and I should probably stick to the ferrite, yes?

I already answered this and even gave you a useful website that generates reasonable core/winding geometries!

 

Offline Siwastaja

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Re: what core type to use for SMPS
« Reply #10 on: May 11, 2019, 04:22:18 pm »
Hiccup mode is also not a light load option; it's used in the event of an overload condition, to prevent the controller from destroying the output switches by "hiccuping" (stopping) the output for 128 cycles, instead of the alternative where it uses cycle-by-cycle current limiting by skipping individual cycles.

Hickup is not to protect the switches, and not an alternative for cycle-by-cycle current limiting. Cycle-by-cycle current limiting - usually not disableable - by itself protects the switches and can provide indefinite constant current (albeit inaccurate) output, as long as your thermal design is OK. These current limiting events are not failure or error conditions.

Hickupping is an addition on top, whenever indefinite constant current output is unwanted. Most often, it counts cycle-by-cycle current limiting events, and sleeps if exceeded, dropping the average current very much lower than the actual current limit.

If you charge batteries, drive LEDs or run motors in torque-limited mode, you want the current-limited mode, but in most other uses, current-limited mode normally lasts for a very short time (think about charging the capacitors), and anything longer is a failure (short circuit). Hickup mode is there to mostly protect the load (the unwanted short), which could be dissipating a lot, while automagically retrying to see if the short has been removed. Another alternative is a "latched" protection, requiring a power-off sequence to reset.

Light load pulse skipping looks similar to hickup, but is there for a different reason, usually with different timings, and is important to distinguish as a separate feature.
« Last Edit: May 11, 2019, 04:25:36 pm by Siwastaja »
 


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