I've just received the XISOUSB211 chip ("X" stands for pre-production preview) I ordered from TI today. I'm still working on the development board design. I'll publish the full design and PCB layout when it's finished.
Today I'm glad to announce that my first prototype of the TI ISOUSB211 development board is now working. The Texas Instruments chip ISOUSB211 works as advertised, it really is the first USB 2.0 high-speed (480 Mbps, not 12 Mbps) galvanic isolation chip on the open market. All design files are available at
https://notabug.org/niconiconi/isousb211Quote myself.
Motivation
USB 2.0 is one of the most commonly used data interfaces. Often, implementing galvanic isolation (electrical isolation) is desirable.
* First, galvanic isolation protects the computer from destruction by high voltage transients and faults. It can be used by embedded system developers and hardware hackers to protect their computers from unexpected faults during development or experiments - the most infamous example is the USB Killer, but more practical examples include a short circuit from +12 V to +5 V, or a back-EMF from an electric motor or inductor, which may create a brief transient of several hundreds volts.
* Next, galvanic isolation is useful to stop unwanted conductive electromagnetic interference between the computer, the USB device, and their power supplies. The most common example is a "ground loop" in audio and video systems, but amateur radio operators with cheap, low-EMI-immunity USB software defined radios can potentially find reliefs from noise as well.
* Finally, in hardware development, galvanic isolation allows engineers to make a floating measurement without compromising safety. The signal ground of an oscilloscope input is usually connected to AC mains ground for safety, and the device-under-test (such as a USB gadget) is often also referenced to ground. In this case, one cannot make a measurement between two arbitrary points in the circuit - connecting the "ground" of the oscilloscope probe to a voltage source is effectively a short circuit. To overcome this problem, engineers often "cheat" by disconnecting the protective ground to "float the scope", but it creates a safety hazard and makes the oscilloscope unsafe - a fault within the oscilloscope can energize its entire chassis. The best practice is to "float" the device-under-test instead of the scope itself, which is accomplished by a USB isolator.
Unfortunately, although USB 2.0 isolators for Low Speed (1.5 Mbps) and Full Speed (12 Mbps) are readily available, there are few isolators for High-Speed USB (480 Mbps) interfaces due to the complexity of its protocol. Nevertheless, high-speed USB is required in many applications, such as high-speed data converters, software-defined radios, or logic analyzers.
Previously, the available isolators are either expensive (FPGA-based solutions), difficult to buy (ASIC isolators unavailable on the open market), inconvenient to use (USB over CAT-5 or fiber optics, which requires a receiver and a transmitter), or with many compatibility problems due to technical limitations in the solution, or a combination of these problems. The USB 3.0 fiber optics + VL670 ASIC for 3.0 to 2.0 translation solution, or the CH317 Ethernet extension ASIC solution, which I both described in this thread, are examples of these limitations.
However, the situation has changed. In November 2020, Texas Instruments have released the first 480 Mbps High-Speed USB isolation ASIC to the open market - ISOUSB211. Currently, the chip is in the pro-production preview stage, but the engineering sample chip, XISOUSB211, is already available for purchase.
This project is a development board design for the ISOUSB211 ASIC, to facilitate hardware evaluation and experiments by other developers in the community, hopefully to help solving your USB problems in your systems.
Board Specifications
Dielectric Withstand Voltage: at least 1000 VDC (likely 3000 VDC, tests needed).
Creepage & Clearance: 6.4 mm
Insulation Type: Functional Insulation
Maximum Operating Voltage: 42.4 VRMS, 60 VDC.
Output Power: 5 V, 500 mA.
Warning
In industrial and medical applications, galvanic isolation is used to protect equipment and human lives from hazards. It should be clear that this development board, while it indeed has a dielectric withstand voltage of more than 1000 volts, it's not designed, not tested, and should not be used for safety-critical purposes. The operating voltage should stay within the Safety Extra-Low Voltage limit (42.4 VRMS, or 60 VDC). The 1000+ V dielectric withstand voltage represents a measure of immunity to transient voltages, not a voltage for continuous operation.
Theory of Operation
The single-board PCB is physically separated into the primary (host) side and secondary (device) side with an isolation barrier in between. Both sides have independent power and ground planes, and are separated by a 6.4-millimeter gap. Across the gap, there's a ISOUSB211 ASIC for isolated USB signal transmission, an isolated DCDC converter module for power transmission, and two Y-capacitors for EMI suppression.
Signal Transmission
On the primary side, the incoming USB 2.0 high-speed traffic from the USB-C connector is received by ISOUSB211. Then the information is modulated to a suitable form and transmitted to the secondary side of the ISOUSB211 via a tiny 1 pF capacitance across the on-chip SiO2 insulator. The secondary side regenerates this USB 2.0 high-speed traffic using the information from the primary side, and finally, the regenerated electrical signal appears at the USB-A connector at the secondary side.
This process is bidirectional, ISOUSB211 can transmit and receive information at both sides, thus establishing bidirectional High-Speed USB communication. And obviously, ISOUSB211 also contains internal state machines for implementing whatever control logic is required for USB 2.0 protocol and the transmission and regeneration of traffic.
The ISOUSB211 has a dielectric withstand voltage as high as 5700 VRMS, Reinforced Insulation, and a impressive rated working voltage of 1500 VRMS, 2121 VDC. However, this is only a component-level rating, the real-world rating by system-level safety standards can be much lower. For example, according to IEC 60950 and IEC 60664, the 8 mm creepage distance at the chip package already limits the working voltage for Reinforced Insulation to no more than 800 VRMS, 1131 VDC (Material Group 1, Pollution Degree 2) even assuming no additional limitations from the rest of the system. Such limitations indeed exist for this development board - which only has a Functional Insulation rating. See the following sections for more information.
Power Transmission
On the host side, the incoming 5V power is demultiplexed by the TPS2111A power mux chip. When "DC IN" is connected, TPS2111A switches the board to use external DC power, otherwise, the board is powered from the USB port.
Immediately after the TPS2111A, the demultiplexed 5 V power is passed through an LC filter to prevent too much differential-mode noise from entering or leaving the USB port. Then, the filtered 5 V power is first sent to the ISOUSB211 ASIC, which creates 3.3 V local power via its internal LDO. Simultaneously, the 5 V power is also sent to a LMR10510 DC-DC converter to create the 1.8 V core voltage supply for ISOUSB211 (ISOUSB211 does have an internal LDO for 1.8 V as well, but LDO is too inefficient).
Finally, the 5 V power is also sent to an SIP isolated DC-DC converter module to derive an isolated 5 V rail at the secondary side, which then derives 3.3 V and 1.8 V just like how it's done at the primary side. When the 5 V power enters and leaves the DC-DC converter, it's filtered by common-mode chokes to reduce the common-mode noise across the isolation barrier.
The isolated converter module has a Functional Insulation rating, with a dielectric withstand voltage of 3000 VDC for 60 seconds. Note that this dielectric withstand voltage is a measure of immunity to transient voltages, and should not be confused with the rating working voltage. Also, the Functional Insulation means the converter has a low design margin and should be assumed to have no safety guarantees, thus this board design should not be used in safety-critical applications. The continuous operating voltage should stay within the Safety Extra-Low Voltage limit (42.4 VRMS, or 60 VDC).
Better isolated DC-DC converter modules with Reinforced Insulation exist, but those modules have limited suppliers and much more expensive. On the other hand, DC-DC converters in a SIP package are a de-facto standard in the industry with many options. Thus, as a tradeoff, a SIP converter is selected and the development board is designed for Functional Insulation. In addition, even when a DC-DC converter with Reinforced Insulation is used, the board is probably still unable to meet the standard of Reinforced Insulation anyway - Reinforced Insulation involves more than component selection - the whole board must be assumed to contain dangerous voltages and be covered by an insulated enclosure, which obviously is unsuitable for a development board. Thus, this is another reason for this compromise.
EMI Suppression
The primary and secondary side are bridged by two 470 pF, Class-Y capacitors for EMI suppression. These capacitors have a working voltage of 1500 VDC [note: this is not a Class-Y rating, but Vishay's rating for this capacitor] and a dielectric withstand voltage of at least 6000 VDC.
When two separated pieces of metal plates are driven by a potential difference, a dipole antenna is created. Unfortunately, it's exactly what happens in an isolated power supply or signal repeater, and this causes excessive common-mode current and radiated electromagnetic interference. In order to have acceptable EMI/EMC performance, the two isolated power or ground planes must be joined together at high frequency via capacitors to eliminate this potential difference - even though this is undesirable from the perspective of isolation: it reduces the dielectric withstand voltage to the rating of the capacitors, and it also allows more transient energy to flow across the barrier via the capacitance, thus, it represents another design tradeoff.
PCB
A four-layer PCB with controlled impedance is used to route high-speed USB signal. The stackup is Signal, Ground, 1.8 V Power, and Signal. The 4th layer only has a few traces, thus it's filled by a ground pour and joined to the 2nd layer by stitching vias. This provides a bit of interplane capacitance for the 1.8 V core voltage.
This board is fabricated by JLCPCB's JLC7628 stack-up. The dielectric constant of the board is 4.6, the distance between the signal and its reference plane is 0.2 mm.
Ideally, the alternative JLC2313 stack-up offered by the same manufacturer should provide superior performance because the shorter, 0.1 mm distance between the signal and its reference plane - it reduces trace width, crosstalk, EMI, and also increase interconnect density and interplane capacitance. Nevertheless, boards manufactured using the JLC2313 process has a longer lead time and slows down experiments. Be sure to adjust the width of the USB 2.0 traces if JLC2313 is used.
Read more in the link:
https://notabug.org/niconiconi/isousb211FAQ:
Q: Your board sucks!
A: If you don't like my design, you can purchase an official development board from Texas Instruments, which is currently being sold at reasonable price, to be honest. The part number is ISOUSB211DPEVM, available at Mouser and Digikey, and it just costs $50, far below the regular inflated price level for development board.
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