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[SOLVED] USI SPI data not in sync with the clock

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Kalcifer:
I'm trying out the ATTiny84A's SPI mode for a quick test, and I'm running into a strange issue. I'm transmitting a byte of FF so I would expect the data line to be held high for 8 clock cycles, then to go low after transmitting. What appears to happen is that yes the microcontroller is transmitting the 8 1s and its clocking 8 times, but whats happening is that the data is offset from the clock pulses. The data appears to begin in the middle of one set of 8 clock pulses and end in the second. So for some reason there's a strange buffer delay or something idk. How do I fix this?

Here's a quick snippet of the code that sends the data:


--- Code: ---int main(void)
{
setupSPI();

    while (1)
    {
transmit();
    }
}

void setupSPI(void)
{
//Puts the USI into 3-Wire mode. Uses DO, DI, and USCK pins for SPI communication.
USICR |= (1 << USIWM0);
USICR &= ~(1 << USIWM1);

USICR &= ~(1 << USICS0);
USICR |= (1 << USICS1);
USICR |= (1 << USICLK);

DDRA |= (1 << DDA4); //Set Pin 9 (USCK) to output the clock signal.
DDRA |= (1 << DDA5); //Sets Pin 8 (DO) to transmit the Master's data.
DDRA &= ~(1 << DDA6); //Sets Pin 7 (DI) to Receive the Slave's data.

//Set PortA0 as an output pin for SS functionality. (May not need this later)
DDRA |= (1 << DDA0); //Sets the pin as an output.
PORTA &= ~(1 << PORTA0); //Defaults the output oft he SS (Slave-Select) pin to be a logical 0.
}

void transmit(/*uint8_t data*/void) //Transmits the 8 data bits.
{
//Use a loop to clock and shift the data register for transmission. Use a timer module?

USIDR = 11111111;

for (int i = 0; i < 8; i++)
{
USICR |= (1 << USITC);
USICR |= (1 << USITC);
}

}
--- End code ---

Here's what I see on the scope. You can see that the data begins in the middle of the clock pulses.

Kalcifer:
Never mind, I think that I just need some sleep. I wrote 11111111 as the data instead of 0b11111111 or 0xFF. Works fine now.

Problem is solved.

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