using SR flip flop to transform a pulse

[john23]

Hello ,I have two pulses which are very slow and have different rates shown bellow
The schematics of SR flip flop with the two switches.
I have tried to build and simulate as shown below.
But there is this switches issue you shown in the schematcs bellow.
how can i represent these switches in my simulation?
Thanks.

[john23]

UPDATE:
Hello  We can look at the situation as logical 1 is +12V and logical zero is -12V.
I dont know why S-R fits this.
As i see it a D flip flop fits more for the dask.
my data is +12V pulse and clock will be -12V.
So if the clock is low(-12V) the D-flip flop passes the data from input to output.
I think the state which points to the red arrow is the best.
In the web site below i have found a schematics shown below.
In this article logical 0 is 0V and logical 1 is 5V.
So i want to test the d-flip flop truth table:
CLK -5V and data 5V so V_base<V_emiter and Q3 is closed
How can i know what is Q1 base voltag in such situation?
Thanks.

https://0creativeengineering0.blogspot.com/2019/03/what-is-d-flip-flop-using-discrete.html