Author Topic: Ceramic Capacitor delamination- NASA failure analysis paper  (Read 4491 times)

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Offline cdevTopic starter

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Ceramic Capacitor delamination- NASA failure analysis paper
« on: January 06, 2018, 04:41:48 am »
This was an interesting read...

Ceramic Capacitor Delamination Problem

https://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/20170012147.pdf
"What the large print giveth, the small print taketh away."
 
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Offline CopperCone

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #1 on: January 06, 2018, 03:24:41 pm »
I wonder if  the risk go down if you reflow them after hand soldering.
 

Offline Yansi

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #2 on: January 06, 2018, 04:13:36 pm »
I still can't figure out what the difference with hand soldering is?

I think we are not told the whole story. "Hand soldering" is to wide of a term and not the thing to blame. They should blame the inccorect soldering processes involved.

They should be at least more specific.
 

Offline DaJMasta

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #3 on: January 06, 2018, 04:25:54 pm »
I still can't figure out what the difference with hand soldering is?

I think we are not told the whole story. "Hand soldering" is to wide of a term and not the thing to blame. They should blame the inccorect soldering processes involved.

They should be at least more specific.

NASA has very comprehensive hand soldering methods for extremely high reliability when being sent to space - while it probably does differ from your normal hand soldering quite a bit, it's been developed and tested over decades for maximum reliability and minimum part damage... so something like this is quite a surprise to them, I'm sure.

Fascinating analysis, though, very comprehensive.  I suppose you'd expect that when a failure could potentially brick tens of millions of dollars in investment.
 

Online Siwastaja

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #4 on: January 06, 2018, 04:36:27 pm »
I wonder if  the risk go down if you reflow them after hand soldering.

No - the ceramic has cracked and is unrepairable. (This "delamination" is similar to cracking, only in different direction than "typical" MLCC cracking.)

It's just worth noting that the effects of the cracks often become apparent only over time. Sometimes a slightly cracked capacitor works 100% fine for months or even years before wreaking havoc.

I still can't figure out what the difference with hand soldering is?

I think we are not told the whole story. "Hand soldering" is to wide of a term and not the thing to blame. They should blame the inccorect soldering processes involved.

They should be at least more specific.

This is pretty basic stuff, very well known today, you'll find a lot of references and almost all MLCC manufacturers simply recommend against any hand soldering process as a blanket statement, for very good reasons.

I guess this NASA study doesn't provide more "basic" details since this stuff is already discussed elsewhere; for example in numerous other NASA reports. They discuss some interesting details of this specific type of MLCC cracking, aimed at people who are already familiar with MLCC cracking in general.

I guess, "hand soldering" really refers to soldering done using a soldering iron and the "tack one pad down, then the other" method. The paper also discussed hand solder rework, which would make sense - for example, I received some boards lately that required such rework since I had messed up the capacitor footprint (just used a footprint supplied with the PCB package without checking, "to save time" - the most basic beginner mistake :palm:), which caused the capacitors to drift in the reflow (luckily not tombstoning), necessitating manual resoldering of the unconnected pad.

The problem with hand soldering is the quick and uneven heating and cooling profile of the capacitor. Also, the soldering iron tip temperature is typically some 50-100 degrees C higher than the comparable reflow process, which is necessary because of dT losses in manual soldering process - but these losses do not always happen and are unpredictable. Hence, manual soldering easily gives 100 degrees higher peak, with 10 or even 100 times quicker heating rate, and all the heat is supplied through one end of the capacitor.

Thermal shocks are simply something surface mount MLCCs can't handle too well. Almost any type of "manual soldering" I can think of produces these shocks, hence any type of manual soldering is not recommended.

(Still, we all do solder them manually every day. But we must understand that this is an informed choice of taking the risk. Completely OK prototyping one-offs that live on the lab table for a few months. Not OK for large production or mission-critical stuff.)
« Last Edit: January 06, 2018, 04:41:29 pm by Siwastaja »
 

Offline Kjelt

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #5 on: January 06, 2018, 04:50:38 pm »
Then they should use other components or the mlcc's with TH pins mounted.
Oh well why don't they use the caps they used in the Voyager, prooven reliability  8)
 

Offline SeanB

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #6 on: January 06, 2018, 07:54:06 pm »
Then they should use other components or the mlcc's with TH pins mounted.
Oh well why don't they use the caps they used in the Voyager, prooven reliability  8)

Try getting the prices from Kemet or Vishay for those capacitors, they are still made. Bulk price for some is in the high 5 figure park per each in bulk, with a 6 month lead time as well if they do not have stock on hand.
 

Offline cdevTopic starter

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #7 on: January 06, 2018, 08:34:30 pm »
Preheating on a hot plate to below the actual melting point combined with manual soldering? (using long tweezers)?

..might put "less uneven" thermal stress on an MLCC?

I wonder if  the risk go down if you reflow them after hand soldering.

No - the ceramic has cracked and is unrepairable. (This "delamination" is similar to cracking, only in different direction than "typical" MLCC cracking.)

It's just worth noting that the effects of the cracks often become apparent only over time. Sometimes a slightly cracked capacitor works 100% fine for months or even years before wreaking havoc.

I still can't figure out what the difference with hand soldering is?

I think we are not told the whole story. "Hand soldering" is to wide of a term and not the thing to blame. They should blame the inccorect soldering processes involved.

They should be at least more specific.

This is pretty basic stuff, very well known today, you'll find a lot of references and almost all MLCC manufacturers simply recommend against any hand soldering process as a blanket statement, for very good reasons.

I guess this NASA study doesn't provide more "basic" details since this stuff is already discussed elsewhere; for example in numerous other NASA reports. They discuss some interesting details of this specific type of MLCC cracking, aimed at people who are already familiar with MLCC cracking in general.

I guess, "hand soldering" really refers to soldering done using a soldering iron and the "tack one pad down, then the other" method. The paper also discussed hand solder rework, which would make sense - for example, I received some boards lately that required such rework since I had messed up the capacitor footprint (just used a footprint supplied with the PCB package without checking, "to save time" - the most basic beginner mistake :palm:), which caused the capacitors to drift in the reflow (luckily not tombstoning), necessitating manual resoldering of the unconnected pad.

The problem with hand soldering is the quick and uneven heating and cooling profile of the capacitor. Also, the soldering iron tip temperature is typically some 50-100 degrees C higher than the comparable reflow process, which is necessary because of dT losses in manual soldering process - but these losses do not always happen and are unpredictable. Hence, manual soldering easily gives 100 degrees higher peak, with 10 or even 100 times quicker heating rate, and all the heat is supplied through one end of the capacitor.

Thermal shocks are simply something surface mount MLCCs can't handle too well. Almost any type of "manual soldering" I can think of produces these shocks, hence any type of manual soldering is not recommended.

(Still, we all do solder them manually every day. But we must understand that this is an informed choice of taking the risk. Completely OK prototyping one-offs that live on the lab table for a few months. Not OK for large production or mission-critical stuff.)
« Last Edit: January 06, 2018, 08:36:21 pm by cdev »
"What the large print giveth, the small print taketh away."
 

Offline Kjelt

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #8 on: January 06, 2018, 08:41:41 pm »
Try getting the prices from Kemet or Vishay for those capacitors, they are still made. Bulk price for some is in the high 5 figure park per each in bulk, with a 6 month lead time as well if they do not have stock on hand.
:scared:  :wtf: are they made from gold ? Where they that expensive back then?
 

Offline CopperCone

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #9 on: January 06, 2018, 09:26:16 pm »
I guess preheating the substrate is important, I can't see any other reason why hand soldering would be different. So the capacitor elongates as does the substrate.

This is really irritating. I prided myself on being able to solder really small parts, now soldering is bad :-DD

« Last Edit: January 06, 2018, 09:37:39 pm by CopperCone »
 

Offline Kjelt

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #10 on: January 06, 2018, 09:39:29 pm »
I guess preheating the substrate is important, I can't see any other reason why hand soldering would be different.
My guess is that you are only heating one side of the component with handsoldering and from 0 to 330 in a second and the delta over the length of the component is 300+ degrees C.
With reflow the difference is that the heating up is more slowly and occurs over the entire component resulting in a delta T over the entire component of zero C.
So mechanical stress due to temperature differences in the component is probably the cause.
 


Offline SeanB

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #12 on: January 06, 2018, 09:48:50 pm »
Look up the price of RS 871-7267 and remember that a 470uF 75V capacitor is a small value, there are Vishay parts available of 10 000uF 100V.

Here we go, the nice ones, or at least part of the range.

http://www.vishay.com/docs/40141/dscc1001.pdf

Note the voltage ratings, the capacitance ranges and also note that mounting hardware is separate as well, and these are most likely subject to US export controls.

As to the original issue with ceramic caps cracking, I guess they should preheat the board for rework, as well as do an extended humidity chamber test on the boards before conformal coating them to catch these types of defect, though the boards might have other issues afterwards from the humidity, and might possibly be failed due to corrosion. Probably they will be best able to solve the problem by mandating all ceramic caps must be used in series parallel strings of 3 capacitors in series and 3 strings, all from a different batch, so the failure of a single cap is mitigated somewhat.
 

Offline T3sl4co1l

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #13 on: January 06, 2018, 10:06:38 pm »
As to the original issue with ceramic caps cracking, I guess they should preheat the board for rework, as well as do an extended humidity chamber test on the boards before conformal coating them to catch these types of defect, though the boards might have other issues afterwards from the humidity, and might possibly be failed due to corrosion. Probably they will be best able to solve the problem by mandating all ceramic caps must be used in series parallel strings of 3 capacitors in series and 3 strings, all from a different batch, so the failure of a single cap is mitigated somewhat.

The slides identified the root pattern: bad lots from the manufacturer.  Subjecting all boards to stress testing is not only prohibitively expensive and time consuming, but subjects them to stresses they don't need.  Lots can be sampled and tested with a high degree of confidence, and this testing can be done before (i.e., receiving qualification) or alongside manufacture (in which case, any boards which accidentally incorporated the faulty lot can be reworked).

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 
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Offline Kjelt

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #14 on: January 06, 2018, 10:07:55 pm »
Look up the price of RS 871-7267 and remember that a 470uF 75V capacitor is a small value, there are Vishay parts available of 10 000uF 100V.
Sorry but IMO we are talking about MLCC caps that would be 10nF to 10uF. We are not talking about >100uF wet tantalums.
 

Offline helius

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #15 on: January 06, 2018, 10:47:14 pm »
For a more balanced comparison try Vishay Sprague 150D series.
For space-rated capacitors in the 1 to 1000 uF range don't forget Vishay BC 123 SAL-AG solid aluminum caps... I think these are also quite expensive.
 

Offline texaspyro

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Re: Ceramic Capacitor delamination- NASA failure analysis paper
« Reply #16 on: January 07, 2018, 04:41:48 am »
NASA has very comprehensive hand soldering methods for extremely high reliability when being sent to space - while it probably does differ from your normal hand soldering quite a bit,

I once weaseled my way into taking a "soldering for manned spaceflight and nasty things that go boom" course.  Pretty much anything that everybody does all the time is verboten.
 


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