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Electronics => Projects, Designs, and Technical Stuff => Topic started by: MuchMore on September 18, 2019, 02:27:32 pm

Title: Vce sat problems
Post by: MuchMore on September 18, 2019, 02:27:32 pm

hey

I have accidentally used an Opto-isolator(LTV-8241S) with an Vce sat of 0.8-1V. And connected it directly to the MCU with an 2k2 pullup to 3.3V
The MCU has an lower threshold of 0.825 to detect an digital Low input.
The opto-isolator was selected because of its really high RTC 600% and is used on line voltage (230Vrms) with 2x100k input resistor (400V 1206 SMD).
Since the PCB is already soldered there is no possibility to make big changes.

What would be the simplest solution to get the voltage down and make the detection more reliable? There is enough space to add an sot-23 package with dead-bug soldering.

I was thinking of mis-using an mcp100 as an 3pin comparator.... but maybe an 2N7002 is enough

Title: Re: Vce sat problems
Post by: StillTrying on September 18, 2019, 03:00:29 pm

Could you swap the Opto's output and resistor to make it a pull-up instead of pull down, of course check the logic high level's min. :-/O

Title: Re: Vce sat problems
Post by: MuchMore on September 18, 2019, 04:47:45 pm

logic level high is 0.75 of Vcc. So 2.475V. It would result in the same problem.
I am currently looking for an better opto-isolator.

Title: Re: Vce sat problems
Post by: mikerj on September 19, 2019, 09:11:47 am

Rather than relying on the maximum Vce being lower than the Vgs of an NMOS transistor, you could use a PMOS (or PNP with suitable base resistor) across the collector load of the opto.

Title: Re: Vce sat problems
Post by: Yansi on September 19, 2019, 09:18:20 am

Or just lower the damn load on it and use a simple standard 50-200% CTR opto.