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| VCO with frequency offset transfer function |
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| Etesla:
Hello all, I'm trying to better understand PLL systems. As far as modeling goes, I think I have and understand all the puzzle pieces (in terms of blocks and their associated transfer functions) except for the VCO block. When the VCO's output frequency is directly related to the input voltage (freq_out(t) = K*Vin(t)), For this case, I understand the math perfectly and I get phase_out(s)/Vin(s) = K/s. Great. However, I have a hard time understanding the math if the VCO's output frequency is offset so that the VCO has the relationship freq_out(t) = a + K*Vin(t). With this equation, if you go through the math to get a relationship between the phase and Vin(t), you get that phase_out(s)=a/(s^2)+K*Vin(s)/s. In this case, it is impossible to write the transfer function because it is impossible to solve for phase_out(s)/Vin(s)... The inability for this relationship to have a transfer function is also obvious from the fact that the initial input voltage to output frequency is a nonlinear relationship from a systems point of view. Herein lies the problem. Online, I have been able to find many references that claim that the transfer function for a VCO with a frequency offset as I have described it is still just K/s. (one example of such a document is [http://www.ti.com/lit/an/scha003b/scha003b.pdf page 33 dealing with Ko) My question is this: What happened to the a/(s^2) term / what do I do with it??? My reference for figuring out how to do the math in general was this video: The attached image called pg1 shows a sketch of the system as I understand it, as well as the math that I understand for the non offset VCO The attached image called pg2 shows my attempt at the math for the frequency offset VCO. All the equations scattered in this post are better written on these two pages. dotted lines separate the three 'sections' At the bottom of pg2, I drew my best idea of what a solution might be for modeling purposes, but I'm pretty sure it still wrong and it still has a question mark. Any help is appreciated, thank you! |
| rfdave#gmail.com:
it's been a few years since i dug into the details of the PLL transfer function, but here goes. I'm coming at this from a Frequency synthesizer background. You have to keep in mind that you're actually working in phase space, not in time, and so the loop transfer function is written effectively as deviations in phase from phase lock. For this, the VCO isn't modeled with a constant frequency. In the video, he sort of expands on this about 10:40 in. You effectively linear the analysis around the center of the VCO tuning range. That tuning range is addressed by the loop divider. As a side note. Please, for the love of all that is engineering, don't try to learn deep technical stuff from a bunch of random youtube videos and app notes. You won't get a good understanding of things. Go get a copy of Phaselocked Techniques by Gardner, or Phase Lock Basics, by Egan and use those. You'll get consistent variables, a logical flow of topics, and questions to work through. |
| Benta:
It's not that hard. The basic VCO equation is FV(s) = [2pi x (fMAX-fMIN)] / [(UMAX-UMIN) * s] fXXX is output frequency, UXXX is control voltage. The equation presumes that there is a linear relationship between control voltage and output frequency. The s in the denominator converts frequency to phase. The complete first portion of the equation can of course be shortened to KV, giving KV/s. Apart from that, I can fully support rfdave's suggestion that you invest in Gardner or Egan. Will cost you a hundred bucks, though. |
| Etesla:
Benta, I understand that that is the standard equation for the transfer function for a VCO that is used in every textbook. My issue is that I do not understand why that formula is correct. If you use that formula to get the transfer function, you are essentially saying that the VCO input voltage VS output frequency curve looks like the orange graph in the attached plot. Why is it OK to just kill the offset frequency like that? It seems like ignoring the phase accumulation that comes from that offset would make the model inaccurate. |
| Benta:
Because only the VCO "gain" (which is voltage to phase) is interesting for the loop response calculation. Try to redraw your PLL without a divider (KN =1 ). Imagine an amplifier with DC offset. I think you'll see how it works. |
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