EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: Yansi on August 11, 2023, 05:37:22 pm
-
Hello,
Just got a fresh SG3525AN (DIL16 packaged), slapped it into a breadboard and wanted to get more familiar with how exactly does it work, just trying to verify I understand the datasheet well enough.
So, what I did, is just connected +12V to the Vc+ and V+ (pins 13, 15). Shutdown pin grounded, Connected Ct and discharge directly together, using a 1nF CT cap and a 33k RT resistor (obtaining about 22.8 kHz switching freq.) So far so good.
Then I wanted to verify, what kind of voltage on the COMP pin you get zero duty cycle. I measure about 0.83V (datasheet says 0.9V typical. Meh.). But what interesting I found, is that the SG3525 is not able to output a pulse shorter, than about 1.8us. It either outputs that, or zero. The datasheet does not specify anything like "minimum output pulse width". So this is my first question: Is the minimum pulse length behavior normal or not? Would have expected the pulse to go to complete zero. 1.8us is hell of a long pulse, that is still about 3.6 % duty cycle at those 22.8 kHz. No good.
Note: Error amp has inverting input connected to Vref, non-inverting connected to ground, so the error amp is not sourcing any current and I am forcing external voltage against the internal 100A current sink. Have also verified, the current sink is sinking 123uA at 5V (datasheet say 100uA. Close enough).
[attachimg=1]
I am still puzzled by the minimum pulse length. Where does it come from and why does the datasheet not tell about that?
If I change RT from 33k to 15k, I get about 620ns minimum pulse width. With 6k8 RT, I get about 500ns minimum pulse width. I think we are onto something. Some strange feature, that is not well documented. Note however, that as the pulse is getting shorter, I get higher osc frequency, so the minimum duty cycle still stays about 3-5%. I hate it!
Anyone noticed similar behavior of SG3525A?
PS: It's been a long time, since I have last posted here. A lot of work, a lot of this, a lot of that, bad mood and what not. No time to fool around in my home lab recently. So, hopefully, now I will have more time to spend hours in my lab building my own stuff in the future.
PS2: The SG3525AN I have is from ONsemi, datasheet here: https://www.onsemi.com/pdf/datasheet/sg3525a-d.pdf (https://www.onsemi.com/pdf/datasheet/sg3525a-d.pdf) (Note the mistakes near the pinout: Shutdown and SYNC shall not have the bar, they are not inverted).
-
Recall these are mildly integrated devices, dozens of transistors, maybe a hundred -- not advanced RTL* designs. The GBW through most any signal path is rather modest. Internal risetimes will be far from ideal, but indeed depend on the amplitude or slope of input signals.
Here, it's most likely that an internal gain node begins to rise/fall, as the CT voltage crosses threshold (COMP), and then reverses just before the next stage (or the next after that, etc.) begins to cross threshold. You end up with some combination of circumstances: runt pulses where the pulse width is somewhat indeterminate (noisy, or inconsistent across temp/mfg range), or the pulse width is highly nonlinear towards the extremes of the range, or dead zones where nothing happens at all (the extreme case of [well-behaved] nonlinearity, it just stops working at all). There may be hysteresis added (intentionally) as well, which has the effect both of sharpening the threshold (when it is finally crossed), and of widening the dead zone (where threshold-crossing will not occur).
*I use "RTL" loosely here; the analog equivalent being comparators, op-amps, switches, constant and dependent sources, muxes, etc.
In all, it's a somewhat useful behavior, at least if controlled to a desirable state; the point for SMPS being, you don't want runt pulses, but a minimum that produces useful work without utterly wasting switching loss in the process. In this way, such controllers can obtain the value of burst mode operation, without having to implement an explicit hysteretic control scheme (the dead band effectively turns the control into a multivibrator).
I actually have a relevant page, back in deep history, that illustrates this effect with basically a single discrete comparator built of... alternative technology, shall we say.
https://www.seventransistorlabs.com/tmoranwms/Elec_Compound2.html (https://www.seventransistorlabs.com/tmoranwms/Elec_Compound2.html)
The transfer function might be a bit rough for a number of reasons (e.g. input ramp rate not slow enough, output PWM filter too slow), but you get the general idea. The explanation is obvious enough: bandwidth limitations from device characteristics (gm, Rp) and stray capacitances, as is the usual case.
Also, not well annotated, that page was sort of a blog, but I didn't write any headings or dates, so it just kind of looks stream-of-consciousness thrown together without having seen the earlier versions... But, that explains why there's kind of three (I think) stages to it. FYI.
Tim
-
Everything is "right"
My old friend Stan Dendiginer was VP Eng at Silcon General, and designed this very first regulating PWM controller.
About 1976 I visited SG HQ and Stan gave me preeprod samples.
It was very advanced in is day.
0/ Nowadays I would avoid use iof this very old part as much beeter parts, higher Freq, use of FET, GAN etc render it obselete. \
Soft switching and resonant mode can be better toplollgires than straight PWM.
1/ Meant for signle end and push pull biplor SMPS at the switch freq used in the 1970s.
2/ Bridges and push pull required a dead time, which was the min pulse width.
3/ Hysterysis and dead band of the PWM was intentional.
4/ See original Silicon Generl app notes, specs and Stan's articles for design, block, and PWM limits.
5/ RTL was an early logi with resistors and transistors and preceeded TTL, CMOS, etc.
We used RTL in 1967..1970, from Fairchild, in round 8..10 pin metal cans.
Just a trip down memory lane...
Enjoy
Jon
-
Thank you for your detailed answer, T3sl4co1l.
jonpaul, please no hate for playing with old stuff. Am trying to modify some old power supply, manufactured pre-2000s, designed likely in early 90s.
I get that IC is old (did not expect it is that much old though), but what does minimum pulse length have in common with the requirement of deadtime? Many topologies do not require one anyway, as there is zero risk of cross-conduction in the power stage. In this case, the power supply is (un)surprisingly a two-switch forward, so they have just used only the OUTB to control it. Never seen anyone use this controller like this.
I find that especially weird, as there must have been plenty of current-mode controllers, beginning with another crazy old thing TDA1060, and stuff like UC384x. No idea why they have chosen voltage-mode control, that to me is kind of scary in a kW level power supply.
Anyhow, the undocumented feature with not-well-defined minimum pulse length is pretty annoying, as it will regulate miserably when low duty cycle will be required. Pulse skipping no good.
Or, I might decide to wrestle in there a current transformer, and have it current-mode controlled and sleep well, it'll not randomly blow up once teased with an odd load transient.
Thanks for sharing your memories with us.
PS: There the designer of the PS must have had some fetish for the SG3525. There is another in charge of the fan control. They designed a buck converter, that feeds the cooling fan. Man,... There must have been stuff like LM2576/2596 in the 90s already, no? //Definitely, found a datasheet from NatSemi dated 1990//
-
Well, if it was cheap -- why not reuse to lower BOM count?
Couldn't begin to guess how much that mattered back then. They're certainly cheap these days (or if not them exactly, then TL494 and relatives), and probably will remain so until obsoleted, but I'm sure they came down along the way too.
Maybe SimpleSwitchers were pricier, being more specialized; still very cheap process (bipolar), maybe they were still a bit new at the time, or too special-purpose just to put one in (or a couple if other supplies are relevant)? Designer might also simply have been more comfortable with 3525.
Tim
-
The 3525 was the 741 of SMPS controllers. Nowadays it is hopelessly outdated, but back in the day it was a major breakthrough. I remember avidly reading the datasheet and studying the sample circuits.
And similarly to the 741, it has several limitations that one must be fully cognizant when designing a circuit with it.
-
I had an issue some time ago using an ST branded SG3525 PWM controller. The datasheet said the discharge resistor value for the sawtooth RC oscillator could be all the way down to zero ohms. Trouble is, if you do that, then if the error amplifier is maxed out the sawtooth waveform on the timing cap goes slightly higher and lower ever second cycle, leading to unequal output pulse pulse widths between the two outputs, with ensuing problems. :palm:
-
The 3525 was the 741 of SMPS controllers. Nowadays it is hopelessly outdated, but back in the day it was a major breakthrough. I remember avidly reading the datasheet and studying the sample circuits.
Even though rather young, I come from the post USSR country, where the only thing available for controlling SMPS was the German B260D clone of TDA1060. So I have no idea, how popular each thing was in the rest of the world. Am only learning that slowly and sometimes making very surprised faces, what was already available in the west back then.
-
Hello again, jammed so just saw these notes now....
In 1975..1980s many SMPS topologies required dead time eg push-pull, full bridge, half bridge PWM.
In SG3525, the minimum PWM is used to enforce a minimum dead time to avoid crossover shoot-thru.
See the original spec and app notes of 1970s by Silicon Genral, not a modern knockoff.
Beware that copies and other sources will have a different die design, and ths different preformance , often worse and cheaper design.
This TI version may be a good reference.
https://www.ti.com/product/SG3524 (https://www.ti.com/product/SG3524)
Bon Chance,
Jon