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| VFD Display 101 |
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| NivagSwerdna:
...like the MPSA55 idea at.. https://threeneurons.wordpress.com/vfd-stuff/ MMBT5401LT3G perhaps? I think I might be challenged in the i/o department so the advantage of some serial shift latch gadget makes sense rather than discrete... but definitely feasible. ... I am still curious of the biasing... if you look at the first circuit in the original post it has a 10K/1K divider as the bias to one side of the filament... I think you were suggesting above similar network up to +5V... the 100R values just seem too low....? PS The polarity of the caps is the same in the first circuit. ;) |
| Ian.M:
The 100R resistors in the potential divider are across the filament to provide a virtual center tap to bias it. They are a tradeoff between wasted power (from the filament driver) and excessive shift in cathode bias potential with varying Ik. For an IV-18 which runs at about 8mA Ia with all segments of selected digit lit, you could go up to 330R without exceeding 1V variation in bias between two segments lit and all lit (i.e between '1' and '8'). A blanked leading digit would shift the bias by 1.3V but as all segments are off, that wouldn't produce a noticeable brightness difference the way the bias shift between '1' and '8' could. However the 11mA grid current would already contribute 1.8V of cathode self bias, which goes away during grid blanking if the coupling capacitors to the LM4871 aren't large enough to maintain the bias during inter-digit blanking. An alternative would be a diode from each end of the filament to the Zener, so the positive swing is clamped at Vz + 1 diode Vf, and using a slightly higher voltage Zener (by half the peak filament drive voltage). That would have much lower losses, and better bias voltage control. |
| NivagSwerdna:
Do I need current limiting R on the grids and anodes? Some designs seem to have them... others do not?? |
| Ian.M:
That would depend on the specific VFD. In general VFDs are designed to be self-limited so that if you apply the rated voltages to filament, anodes and grids, you wont exceed the max permitted anode or grid currents, and if multiplexed with a duty cycle appropriate to the number of digits, also wont exceed the grid or anode dissipation design limit (which may be omitted from the datasheet). If you are running a multi-digit VFD without multiplexing during development (e.g. if debugging the MCU freezes the multiplexing), it would be advisable to reduce the HT supply so that the brightness of the selected digit isn't significantly higher than it would be if multiplexed. |
| NivagSwerdna:
So the datasheet assumes that it is multiplexed and in the case of an IV-18 that a digit is only on 1/9 th of the time? |
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