After loooong loong time, I finally got back to work a bit on this project.
So this is what I came up with for a prototype to test:

The idea was to have at least a bit of bias flowing through the power stage - in this case 1mA. That equals to about 0.7V across R3 (R4), requiring about 850uA of current through T1, T2. Diodes D1 and D2 shall do just that, as about 1.2V is left across R14+R15 (resulting in about 850uA. Of course, it all depends on the exact voltage drops across all junctions, but I think as a ballpark figure it should work.
Resistor R7 was calculated such that under any circumstances it can produce a maximum of 2mA through T1 (T2), resulting in about 10mA maximum output current.
T1 and T2 are purposely biased from 0 and 5V, which is the same voltage as the opamp has, so that with a zero output voltage, the opamp output should sit just in the middle around 2.5V.
What do you think about that? Will it work or do you see there any major flaws? Thank you for any hints. If all goes well, I will test the circuit tomorrow.