Are HSYNC and VSYNC ignored in modern DVI/HDMI video sinks?

[jakubhladik1]

Hello,

I have been working with video for a few years as an FPGA engineer and I have noticed that HSYNC and VSYNC are ignored by modern LCD displays. I have recently tested on 3 different displays at home and none of them cared the HSYNC and VSYNC were missing in the DVI/HDMI stream. I wrote a custom DVI transmitter which does not encode HSYNC or VSYNC at all (only transmits CTRL0 during blanking periods) and the displays recover the video based only on the edges of DE and time intervals between active lines to identify horizontal and vertical blanking periods.

Both DVI and HDMI specifications require encoding HSYNC and VSYNC but is it your experience that modern video sink implementations ignore them? I am only interested in your answers because of minimalistic hobby implementations of DVI/HDMI and pure curiosity.

[MarkS]

My understanding is that modern LCDs pretty much display the entire frame at once, rendering the sync pulses relics of the past. Gone are the days of scanline rendering. I could be wrong here, but I believe that they are only needed for digital to analog video converters and older flat panel displays.

[Someone]

Like with any widely implemented protocol, some shortcut/assumption or simplification will probably with some subset of the devices in use. For your own home use doesn't matter about compatibility. If you were designing/writing a HDMI sink would you use the hsync or vsync?

[Haenk]

I would also assume that the internal framebuffer rather uses autodetect for maximum compability; it seems that a lot of devices just are not HDMI compliant and are not generating HSYNC/VSYNC at all.

[jakubhladik1]

Modern LCDs work, at least on the lowest levels, like a DRAM. The subpixels which hold the liquid crystal hold charge just like a DRAM cell does. The charge in the cell also leaks and thus has to be refreshed. The LCD has rows (=gate drivers) and column (=source drivers) drivers. The rows are driven by gate drivers to open a row to the column drivers. The column drivers drive an analog voltage to the columns to achieve various levels of polarization through the liquid crystal and thus prevent or allow certain amount of the backlight to reach the user. Color LCDs place color filters in front of the cells to achieve RGB (thus you need 3x the amount of horizontal cells). Monochrome LCDs do not have any filters.

That being said, on the rudimentary level, the LCD is still driven very similarly to a CRT. Gate drivers open each row one at a time, usually in a top-to-bottom fashion. Once a row is open, source drivers, which are DACs with many outputs, drive analog voltages to each of the opened cells of the row. Once that is done, the row is closed, and next row is opened. Often, the source drivers are fed with digital values serially and they are being shifted through each of the source drivers in a daisy-chain fashion as each of the source drivers (=DAC) has only a limited number of outputs and multiple source drivers are usually required to drive all of the columns of the LCD. Therefore, the cells are driven with the desired analog voltage from one side to another, usually left to right. This top-to-bottom, left-to-right raster scan fashion of setting of desired pixel values is very similar to a CRT.

Since the LCD is like a DRAM, there was a push in the past to have a directly addressable LCD. With this LCD, we can draw the full image initially and then only redraw a portion which needs redrawing, saving bandwidth and power. As far as I know, these were only proof-of-concept ideas and never made it to the production and to the commercial world.

This explanation only explains how a liquid crystal display glass is driven. It ignores the fact that a TV or a monitor might have a full or partial frame buffer to aid in scaling, de-interlacing, etc. Either way, the LCD can be driven by simply observing the edges of DE, without any syncs as there are no ramp generators driven by those syncs to aim the electron gun as it was in the era of CRT.

DVI 1.0 specification mentions this fact when requiring HSYNC and VSYNC in 2.2.10: "It is expected that digital CRT monitors will become available to connect to the DVI interface. To ensure display independence, the digital host is required to separately encode HSync and VSync in the T.M.D.S. channel."

That being said, I would like to continue the discussion about all of your experiences with various sources and sinks.