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Electronics => Projects, Designs, and Technical Stuff => Topic started by: Dmeads on June 12, 2020, 09:53:21 pm

Title: What is this DOT OR gate in this 8b/10b article?
Post by: Dmeads on June 12, 2020, 09:53:21 pm

Hey! working on 8b/10b in Verilog. Im using the original 1983 IBM article to structurally code it. Cant seem to find what this gate is (see pic)

All is says is " OR DOT"

any ideas?

Here is the original article. The gate shows up on pg. 11
https://opencores.org/websvn/filedetails?repname=1000base-x&path=%2F1000base-x%2Ftrunk%2Fdoc%2F01-581v1.pdf (https://opencores.org/websvn/filedetails?repname=1000base-x&path=%2F1000base-x%2Ftrunk%2Fdoc%2F01-581v1.pdf)

Title: Re: What is this gate in this 8b/10b article?
Post by: ataradov on June 12, 2020, 10:41:38 pm

I've heard a name "Dot OR" for wired-AND circuit where AND is implemented by connecting two open-collector outputs together. I'm not sure if that makes sense in this context.

Here is a description https://en.wikipedia.org/wiki/Wired_logic_connection

Title: Re: What is this gate in this 8b/10b article?
Post by: Dmeads on June 12, 2020, 11:14:40 pm

Okay I did some digging and I found the authors used Motorola's MECL (Monolithic Emitter Coupled Logic) 10000 series chips to implement the design so ya, you're probably right. Thanks!

Title: Re: What is this gate in this 8b/10b article?
Post by: jmelson on June 13, 2020, 02:18:44 am

Quote from: ataradov on June 12, 2020, 10:41:38 pm

I've heard a name "Dot OR" for wired-AND circuit where AND is implemented by connecting two open-collector outputs together. I'm not sure if that makes sense in this context.

Here is a description https://en.wikipedia.org/wiki/Wired_logic_connection

In ECL, it is actually a "wired OR" as the gate outputs pull up when active, and let the pull-down resistor control the logic level when not active.  So, if either gate output is active, the logic level gets pulled up to a '1'.

Jon

Title: Re: What is this DOT OR gate in this 8b/10b article?
Post by: fourfathom on June 13, 2020, 02:35:40 am

Logically it's a NOR gate.

out = !(A | B)

Title: Re: What is this DOT OR gate in this 8b/10b article?
Post by: helius on June 13, 2020, 03:37:22 am

Each AND gate (the symbol that looks sort of like an 'A' is a ∧) has two inputs and two outputs. The inputs are inverted, indicated by a small triangle at the end of the wire. In the most common symbology this is indicated instead by a small circle on the wire. Only the bottom output is inverted, and the top output is normal. By De Morgan's rule, this is equivalent to a NOR gate (for the top output) and an OR (for the bottom output).

The Wired-OR of the normal outputs of the two AND gates is an EQV of a and b. It is true iff A=B.

This kind of two-output, one-normal one-inverted is a natural use of ECL since it is current switching logic. Current is switched to exactly one of two possible paths.

Title: Re: What is this DOT OR gate in this 8b/10b article?
Post by: Dmeads on June 13, 2020, 04:16:17 am

Quote

The inputs are inverted, indicated by a small triangle at the end of the wire.

hmm. wierd. Okay so just to reiterate (so I dont screw up my code more than I already have  :palm:) The OR DOT is True if A = B, and the AND gates have inverted inputs, so are like a negative AND gate. The top output is a NOR function, and the bottom output is inverted so OR.

Thanks guys, really appreciate it.