| Electronics > Projects, Designs, and Technical Stuff |
| When one PLD just isn't enough |
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| Mr. Scram:
--- Quote from: fpgaarcade on December 28, 2018, 04:42:03 pm ---Sure, I'll respond later this evening. I joined Q in 93 ish so this card was just leaving R&D and going into production. I used a lot of the ideas on this card for the first generation of image processing on the HD machines. Interestingly, this card replaced three boards in the Henry system - which was great as it freed up slots for, well, more of them! /Mike --- End quote --- I'd love that. Things like these are why I'm on these forums. |
| NiHaoMike:
--- Quote from: dmills on April 09, 2018, 11:44:10 am ---Quantel missed the memo about doing video in graphics cards --- End quote --- Weren't there a few ATI GPUs 15 years ago or so that had video input? I recall they had very limited success since videoconferencing was a niche market and live streaming games pretty much didn't exist. |
| oPossum:
--- Quote from: NiHaoMike on December 28, 2018, 06:51:25 pm ---Weren't there a few ATI GPUs 15 years ago or so that had video input? I recall they had very limited success since videoconferencing was a niche market and live streaming games pretty much didn't exist. --- End quote --- ATI Theatre series chips. (Not GPUs.) |
| fpgaarcade:
I'm probably going to regret sticking my neck out here ;) I was in Q R&D from 1995 to 2008 ish - but contracted for a couple of years on and off after I left. The image card was designed by a chap called Simon Jones in a couple of months if I remember rightly. It was usual for one developer to do the complete card, and one layout guy/girl to route it. Probably an 18 layer card, might have been more. He moved to Japan a few years ago and I haven't talked to him for a while, I'll try and get hold of him. When I joined this card had just entered production, but I used a lot of Simon's code in my designs for the first HD systems, using first larger flex8k but mostly flex10ks by that point. Quantel's philosophy was essentially no-compromise on picture quality, so everything was done as well as it was possible to do - money almost no object. Our customers were doing high-end commercials and wanted the best possible result. My memory is a bit rusty, but if you look at image card picture, down the bottom left is the transputer subsystem with local memory. This used a few of the standard MAX7K CPLDs we used everywhere. The computer managed the card and communicated with the main CPU at the top of the rack. All the flex8K's were volatile and had to be configured when the card booted. The FPGA image files were part of the system software, and could be updated. Top left is the address generator which managed the first store (cypress chips mid left). I'm guessing a bit here but we usually had FPGAs either side of the store which took the video data and made it wider, so it could be written to the store in a shorter period of time, allowing cycle sharing and hence multiport access. Top right is the output store, four channels CMYK or RGBK I think, flowing down to the Logic devices filter chips. To the right of the filters I think are 3 Quantel Combiner ASICs which do x*k + y*(1-k), where k is key. We had to fetch a lot of points and filter them to derive each output pixel. The picture would be written into the store (a bit bent) and then read out with multiple read store ports in parallel to generate the data to be filtered. At the same time the address generators would work out the filter coefficients to be fed the the Logic devices and then this would be written back to the store. This card could also do full 3D LUT manipulation for keying, which involves reading 8 pixels around the point of interest in 3d space and then doing a tri-linear interp. In the centre is a cypress PLL and clock buffers to give a zero delay clock distribution network. The video clock, usually 27MHz was star distributed to all the devices from there. So, why so many small FPGAs? Well, compared to what we used before - the CPLDs, these were pretty big with 282 flops. You could fit enough logic for one channel of pixel processing and enough IO to get the video and control data in and out. You would often have the same design duplicated 3 or 4 times for each colour channel. It was also about cost. The price went up faster than the logic did, so Simon worked out that lots of small chips was the most cost effective - we got a pretty decent price on them due to the volume! /MikeJ |
| fpgaarcade:
Thinking about it overnight, it might not have been 18 layers - no BGAs on it. Many of the Henry cards were 10 layers. Does it have the stackup layer numbers printed on it? I can't see from the photo. /Mike |
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