The main reason I know of is for ATE (automatic test equipment).
In the 80s, these were commonly bed-of-nail fixtures that probed every circuit node and exercised the components as individual parts. They were tested against a library so the ATE programmer could mostly just assign the pins and call up a library, but 2 things stopped this : the presence of other signals, especially clocks and feedback, and pins which are tied high or low. If other gates drove them they could be overdriven, but not power and gnd. So a passive pullup or pulldown would allow the part to be fully tested with the standard library.
So you'd go through the board, ensuring that each logic component was in a passive, undriven state. if you couldn't do it, you'd have to use a partial test. True, you'd be testing functionality you didn't need - but a chip with some faulty pins is likely to be shortlived.
I was also told that some generation of TTL could tolerate higher voltages on the supply pins than on the logic pins, and pulling up with reistors was safer. Don't know how true that was.
Neither of these are very good reasons to do it today.