| Electronics > Projects, Designs, and Technical Stuff |
| Wide input and output range power pre-regulator (85–265 Vac / 2.5–52.5Vdc / 5A) |
| (1/7) > >> |
| prasimix:
I'd like to present here the latest development of topic that is hidden inside another topic since I believe it could be by itself interesting to many builders of their regulated bench or lab power supplies or to anyone else how need a wide input and output AC/DC isolated converter with continuous output current of up to 5 A. Please note that this solution also include bias power supply with few outputs that can be used for powering post-regulator or similar circuit. This circuit is working with AC mains voltage but with certain precautions and discipline it can be safely built and make operational. Minimum requirement for doing that is decent isolated scope, and for beginning a high voltage power supply with current regulation/limitation. I've used a 100 V, 0-3 A bench power supply that was predecessor of EEZ H24005 that unfortunately goes only up to 80 V that is a little bit too low. Afterwards an isolation transformer with 120 Vac and 240 Vac is used for testing wider input voltage range. More convenient is use of auto-transformer/variac but I still don't have one on disposal. A great progress is made after my latest post in original thread, and it's now more or less completed and only independent third party certification (I'm working on it, its more now a question of securing money for lab testing then anything else) is needed to run a group buy or serial production. Also, since my the latest post (middle of September) I learned in hard way how inappropriate PCB layout could put in question functionality of complete AC/DC converter, especially when you works with controller like LM5014B which has few very sensitive inputs or when you're using fast SiC MOSFETs for switching. Just a small overview: the power section of the first working prototype of this pre-regulator (r1B10) worked fine, but due to some potential issues (e.g. current transformer on the secondary side that is not hi-pot) and modifications in NFB and tracker circuit and new PCB (r3B7) is done. Unfortunately in that version I put LM5041B below power inductors and when higher current started to flow that interfere with RT input and "over-sync" LM5041B and increase working frequency for more then 20 times! In the next attempt (r4B4) power section is completely redesigned but NFB traces that goes to COMP input was way too long and push-pull MOSFET's heatsink crossed over that traces (the air distance was more then 10 mm but still too close!). The end result was again that power section doesn't perform as intended if output voltage was above 40V and current higher then 3 A. Such mistakes cost me lots of time: from designing PCBs, waiting for manufacturing to assembling and testing. Finally in version r5B4 (shown below) everything is put in place and works nicely and I'll show in the coming posts recent measurements and behavior, together with explanation what is as why tweaked on it that become r5B5 version published recently on the GitHub. |
| prasimix:
The updated block diagram of CF-DIC pre-regulator is shown above, while complete schematics can be found on GitHub (.pdf, .png, Eagle .sch) or down as attachment. The main difference from first working prototype (r1B10) is that current transformer (CT) is now moved on the primary side and additional protection is added to make it resilient against overheating (OTP) and output over-voltage (OVP) in case that control voltage (U_MON) goes over 2.5 V. The same OVP acts as protection against prolonged short circuit condition (i.e. more then about 100 ms) on output terminals. The over-temperature protection (OTP) is simply accomplished by monitoring NTC mounted on push-pull MOSFETs heatsink and compare it against voltage set by R55, R59. When set threshold is met, IC4B will trigger thyristor (Q4) that will grounded LM5041B UVLO input and block operation until power is recycled. If power is recycled too early, i.e. the NTC is still too hot, OTP will be instantly triggered. The over-voltage protection (OVP) is aimed to limit max. output voltage which could goes far beyond max. operational range and easily destroy sync MOSFETs (Q7, Q8) in the first place. The Vds on them are defined by main transformer (TR3) ratio and for 2:1 ratio Vds will be approximately twice higher then set output voltage (i.e. 50 V for 25 V output). Selected sync MOSFETs are rated for 150 V, therefore set output should never go over 75 V. For example, for output set to 52.5 V (Iout=2 A), Vds on the sync MOSFET looks like this: Usually in isolated converters the control signal (feedback loop) is applied to COMP input and FB is not used hence grounded. Here FB input is used to actively protect power converter by utilizing FB input if Vclamp voltage derived from push-pull stage (via D15, D18, C39) goes beyond set threshold, i.e. if R42+R42, R52 voltage divider gives more then 0.75 V LM5041B internal FB comparator will start to conduct and limit PWM duty ratio of HV buck stage. Therefore for set threshold of 130 V, the output voltage cannot exceed 65 V and Vds on sync MOSFETs cannot rise over 130 V. The OVP circuit (IC4A) is only an add-on to just mentioned active duty ratio limiter, and if output voltage is too high for longer then what is set by RC delay (R57, C53) the IC4A will trigger Q4 and power recycling is required to continue with operation. Of course if error condition is still active (i.e. large control voltage is applied, or NFB + tracker malfunction is present) the OVP will trip again. For above mentioned example (Vout=52.5 V, Iout=2 A) the Vclamp present on C39 looks like this: It's a slightly higher then 52.5 V (112 / 2 = 56 V) due to losses on path between primary and output terminals. Does output could rise over mentioned 75 V for selected sync MOSFETs or not can be easily checked by measuring buck output for max. operational voltage of 52.5 V. For Vin=240 Vac and Vout=52.5 V, the HV buck output looks like this: For max. allowed output voltage duty ratio is just about 17%. Now you can imagine what output voltage could be if PWM duty rise to e.g. 80%. Actually, in our case the max. duty is limited to be slightly over required value for Vmin and max. load. That is accomplished with R54, but still for higher Vin that limitation alone cannot provide needed protection. The OVP comparator circuit required a little bit more attention since boundary conditions such as start-up and applying huge load could induce false triggering. Therefore blanking circuit is added that consists of C50, R62, D23, C51 and it is repeatedly tested and works predictably (i.e. no false positive happened). Finally, if any of protection tripped and shut down LM5041B (via ULVO pin), a red colored LED and open-collector output (nFAULT) will indicate fault condition and external control circuit (i.e. MCU and/or post-regulator) could be notified that something is happened. The nFAULT output is isolated (OK2). |
| prasimix:
In this post I'll show how HV buck output looks like for max. output power and no load. Additionally CT (current transformer) output is also presented for max. output power. Buck output for Vin=240 Vac (50 Hz): ... same as above with different time base: When Vin is decreased to 120 Vac, the ripple will be much higher, but still not too high to push UVLO input voltage below 2.5 V threshold: ... and with different time base (trigger level is intentionally moved down to get idea how pulse width fluctuate): Since according to LM5041B datasheet ULVO max. input signal is 7 V (and min. is 2.5 V) that doesn't make enough room to provide wide input voltage range, because for higher Vin output from R29+R36, R41 will go over 7 V. This issue is resolved by simply limit max. UVLO input voltage with 5V1 Zener diode (ZD4). CS (current sense) input on LM5041B is very sensitive and additional care is needed to route traces from CT (current transformer) to its input RC filter. To lowering noise both CT output lines are attenuated with R48, R53 and C46 is increased to 2n2, otherwise with Vin=120 Vac and previously used 470p internal current limiter is activated and it's not possible to get more then 48 Vdc on the output (if the same load is used with Vin=240 Vac converter will deliver max voltage with Iout=5.5 A). Measuring CS input require also additional attention because if probe ground lost its connection to circuit ground, probe tip will collect nearby noise that will affect control loop stability. Measured rectified and filtered CT input (over the C46, with short GND connection!) for Vin=240 Vac and max. output power CS looks like this: This is the actual CT output (rectified but not filtered) measured on D20 cathode for the same condition as above: If Vin is increased to 240 Vac, current that flows thru CT is much lower and for max. output CT in on the C46 looks like this: ... and the actual CT output (rectified but not filtered) measured on D20 cathode for the same condition as above: It's clearly visible how HV buck's duty vary for different Vin and the same load. |
| prasimix:
After last post I spent some time to define and order metal enclosure prototype, optimize BOM and to check and fine tune compensation networks for tracker that control LM5041B and VIPer35. The enclosure prototype looks like this: ... and without top cover: As you can see all connectors and LEDs are located on the same side for simpler wiring and monitoring. Selected material is 1 mm thick Aluminum. Two extra pieces will be used as thermal bridges to transfer heat to the enclosure. Enclosure 3D model is in attachment and can be inspected in Adobe Reader or other PDF reader capable of rendering 3D files. |
| prasimix:
Before compensation network adjustment is performed I've checked one important component in the (opto-isolated) feedback loop and that is opto-coupler LED current that define, for given opto-coupler transfer ratio, how fast changes on the output will be transfered to the PWM controller (LM5401B), i.e. it participate in total loop gain together with NFB op-amp (TL103) and PWM op-amp inside LM5041B. I was started with value for Rled (R85) that is, as we'll see, too low, and that resulted in high loop gain and over-sensitive response to any disturbance on the output - the circuit is unnecessary overreacting :). The following LTspice simulations shows how Rled affect operation. Let's start with 470R (R2 in spice model): Reference voltage for error amp is 2.5 V therefore a small step from 2.4 to 2.6 (green trace) is used to generate disturbance. Blue trace displays how error amp (TL103 in our case, comparable LT1006 in the model) will react with used compensation network (C2 || R3+C1) and red trace show us what we can expect on the LM5041B's COMP input. Please note that OC's collector resistor R1 is inside LM5041B what can be found in its datasheet (see Fig.3, pg.9). We can see that slope is too large, and that will cause a huge difference in PWM duty ratio for the HV buck. Consequently that will cause a huge change in output voltage. Now we can go in another extreme when Rled is too large (and consequently max. LED current is too low) and select 10K: Here we can see that another problem arise, the error amp will not be able to push PWM duty cycle down to zero. The LM5041B COMP pin cannot go below 3 V that is more then 50 % duty ratio, what can be rather dangerous situation (for that duty cycle and high Vin of e.g. 240 Vac it will be way over max. Vout of 52.5 V). Note: the LM5041B doesn't need 0 V for 0 % duty, but it's still well below 3 V (it's around 1-1.5 V if I can remember correctly). Finally, we can see how this "transfer" works with selected value of 3K3: It's almost perfect - the PWM input (red) will almost 100% accurately follow the error amp response (blue) with applied compensation network. All three cases together, that can be generated with file in attachment, looks like this: Now we can see how compensation network is selected. That is done empirically with assistance of scope and signal generator (I have both functionality in DS1074Z-S). The picture below shows how and where signal from generator is injected. The R1 and R2 mirrors R81, R77 values and signal is decoupled with huge elco (3300 uF) with positive polarity connected to the feedback loop voltage divider middle point. Disturbance of 1 Vpp is selected and final testing frequency of 120 Hz. When I started with initial compensation network (with values presented in first version of schematics) with 1 Vpp and 5 Hz I got the following response (yellow is Vout, blue is injected signal): Overshooting and oscillations are clearly visible but converter wasn't unstable as I tested it over the whole voltage and current range. But, since compensation is far from optimal that resulted e.g. in quite visible Mains frequency ripple (100 Hz in my case) on the output. I've use the following procedure: select C(ti) and C(td) values and find right values of R(Kp) and R(Ki)1 using trimpots. The value of R(Ki)2 is changed in later stage when I got first promising results: I started with 10K and then select 5K6 without any iteration in between. The next screenshot shows one example of overcompensated network: When testing, I set Vout to approx. middle of range (25 V), so was the case with drawn current (2.5 A). But, be aware, even if you came to satisfying step response shape with certain combination of Vin, Vout and connected load, that doesn't necessarily mean that additional adjustment is not required for different combination of both Vin and set Vout and Iout. Therefore I've tested again the whole range and find out that with Vin=240 Vac and Vout below 15 V output ripple is started to increase (almost doubled). So far I found that compensation network works fine with both Vin=120 Vac and 240 Vac over the whole range. In the process I also removed two costly component: output elcos and now only 1500 uF instead of 4500 uF in total. Step response now for Vin=240 Vac looks like this: ... and for Vin=120 Vac even a little bit better, since a little bit of overshooting is good for better output ripple figure: The same method is also used for checking compensation network for VIPer35 that is used by manufacturer (ST) in one of their eval. boards. Output regulation is not achieved here with error amp but with simple zener diode. Therefore the signal injection point is different. In series with zener diode ground leg a small value resistor (10R) is added as an entry point for signal generator output as shown in the following picture: For Vin=240 Vac step response looks like this (again yellow is Vout, blue is injected signal): ... and for Vin=120 Vac like this: I find them quite satisfying and decide not to change anything here. |
| Navigation |
| Message Index |
| Next page |