Author Topic: Wien Bridge project  (Read 29274 times)

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Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #100 on: April 20, 2021, 02:59:18 pm »
I don't remember your circuit (and I'm not very good at circuit design), but I can tell that for Wien-Bridge topology a THD depends much on an amplitude control circuit setting. From my experience, it may vary by 20-60 dB with a relatively small AGC change.

To my knowledge, the trick is to minimize the influence of the JFET, to minimize Vds, and to strive to reduce channel modulation by feeding half of the AC at drain back to gate.

The latter is accomplished by the voltage divider R9/R10 (R10 is connected to U2 output, which has a stable DC, so in signal terms it equals ground.)

I will try to replace R3 & R4 with 33k and 16k, respectively, which should reduce Vds by a factor 3, and also restrict the possible operating range of the JFET. Hopefully it will not be too restricted to allow oscillation across the entire frequency range.

 

Offline SiliconWizard

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Re: Wien Bridge project
« Reply #101 on: April 20, 2021, 03:50:40 pm »
For measuring purposes it [ASIO] gives much lower noise and THD for my card. It's like 16 bit vs 24 bit (Windows MME vs ASIO).

Not trying to argue, just to learn if this difference can be measured indeed (and not just an audition placebo effect).

I always thought ASIO is about latency and Windows drivers only, so at least in theory it shouldn't make any difference in noise or THD.  (unless the non ASIO Windows drivers are in fact 16 bits only, and can not take advantage of the full range of a 24bits ADC).

Do you have any link, or measurement charts of ASIO vs non ASIO noise/THD, please?

ASIO gets your the most direct access possible to the supported sound card. MME, definitely not. It goes through the whole Windows audio subsystem including mixers allowing shared use of the sound card. ASIO has exclusive access. And yes, for a long time, you could only get 16-bit samples through MME. We're talking over 20 years ago. Also, ASIO was the only way of getting access to more than 2 channels.

Things have evolved on Windows. I think starting with Windows 2000 (or NT?), the only way to get equivalent "direct" access to the sound card was to use Kernel Streaming. It wasn't that well documented though, but it worked.

These days, the best option on Windows, apart from ASIO, is to use WASAPI. It gives you the same level of performance and can get you exclusive access as well.

Whatever solution you choose, if it can't guarantee exclusive access to the sound card, then you can't fully control what it is that is going in and out. MME, even with recent Windows versions, can't ensure exclusive access AFAIK, so it's best avoided. It can allow > 16-bit samples though, through "extended formats".

If your sound card doesn't have ASIO drivers, definitely use WASAPI. Most of the recent audio software supports it.
 
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Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #102 on: April 20, 2021, 05:01:57 pm »




OK, I have established that it makes a really, really minute difference in my case. Enough ASIO for now :)
« Last Edit: April 20, 2021, 05:05:32 pm by richlooker »
 

Online Kleinstein

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Re: Wien Bridge project
« Reply #103 on: April 20, 2021, 05:48:36 pm »
I don't think using much larger resistors in the feedback is a good idea. The LM6172 is not made for a high impedance input and may show nonlinearity and definitely more noise.
One may be able to add some more trimming to R4, so that the FET would operate in a better range. A smaller or trimmed R5 may also be an option.

One could consider adding some one sided loading to the OP, to make the output stage run in class A mode. This may reduce the distortion of the OP.
some resistor directly at the output of the osciallor may also be a good idea, to reduce the effect of capacitive loading.

 

Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #104 on: April 20, 2021, 06:26:04 pm »
I don't think using much larger resistors in the feedback is a good idea. The LM6172 is not made for a high impedance input and may show nonlinearity and definitely more noise.
One may be able to add some more trimming to R4, so that the FET would operate in a better range. A smaller or trimmed R5 may also be an option.

One could consider adding some one sided loading to the OP, to make the output stage run in class A mode. This may reduce the distortion of the OP.
some resistor directly at the output of the osciallor may also be a good idea, to reduce the effect of capacitive loading.

I really doubt the opamp is a factor yet. I also don't consider 33K/16K to be "high impedance"; I'll try and see what happens.

Simple things first; I adjusted P2 to trim the oscillator RMS out down from 3.1V to 0.775V; this is the result. Definitely a big improvement; THD below 0.02% and the 2nd harmonic is now 76-77dB below the fundamental.

« Last Edit: April 20, 2021, 06:27:56 pm by richlooker »
 

Offline RoGeorge

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Re: Wien Bridge project
« Reply #105 on: April 20, 2021, 07:57:31 pm »
A side note, add a capacitor between the cursor of the voltage reference and the ground.  As it is now, the impedance of that node is in the range of 10k, so very susceptible to noise and hum.

Add e few tens of uF parallel with yet another 0.1uF.  This will lower the impedance of the voltage reference at lower frequency like the 50Hz hum, the higher RF or other noises in general.




So far the FET nonlinearities seems to be the main contributor at the end distortions.  Try to look again at the steps explained in the article of Jim Williams I linked in the first page or so, and apply those techniques to your schematic.

Do not dismiss the content because of hand-drawing schematics in that pdf or because of the title, the dude is legend, one of the best analogue engineers ever.
 
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Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #106 on: April 21, 2021, 06:59:41 am »
A side note, add a capacitor between the cursor of the voltage reference and the ground.  As it is now, the impedance of that node is in the range of 10k, so very susceptible to noise and hum.

Add e few tens of uF parallel with yet another 0.1uF.  This will lower the impedance of the voltage reference at lower frequency like the 50Hz hum, the higher RF or other noises in general.

Do you mean decoupling capacitors between power pins at the opamp and ground? WHile not in the schematic, I have 100nF ceramics close to the IC, and I will add a couple 47µF as well.


So far the FET nonlinearities seems to be the main contributor at the end distortions.  Try to look again at the steps explained in the article of Jim Williams I linked in the first page or so, and apply those techniques to your schematic.

Do not dismiss the content because of hand-drawing schematics in that pdf or because of the title, the dude is legend, one of the best analogue engineers ever.

I am not dismissing it, not at all :) But I arrived at the current circuit through a stupid design mistake; I started out by considering ways to reduce distortion, but then I got sidetracked by the frustrations of having to deal with parasitic capacitances on the breadboard, and fast-tracked making a PCB. Now I have to make the best out of it. Replacing R3/R4 with 33k/16k did not work very well, the operating range of the JFET became too small, yielding an unstable circuit. I'll revert this, and try to replace R10 with a 91k resistor in series with a 20k trimpot.

Once I have everything assembled, I can start working on an alternative circuit, maybe revisit the optocoupler feedback, and incorporate the servo from Williams' circuit to eliminate common mode swing.
 

Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #107 on: April 21, 2021, 12:51:12 pm »
95k-105k trimmer to replace R10.

 

Offline RoGeorge

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Re: Wien Bridge project
« Reply #108 on: April 21, 2021, 01:49:25 pm »
A side note, add a capacitor between the cursor of the voltage reference and the ground.  As it is now, the impedance of that node is in the range of 10k, so very susceptible to noise and hum.

Add e few tens of uF parallel with yet another 0.1uF.  This will lower the impedance of the voltage reference at lower frequency like the 50Hz hum, the higher RF or other noises in general.

Do you mean decoupling capacitors between power pins at the opamp and ground? WHile not in the schematic, I have 100nF ceramics close to the IC, and I will add a couple 47µF as well.

I've seen on your breadboard (didn't had the time to look at the PCB version at all) there was no decoupling between the node named "Voffset" (the positive input of the U2 feedback amplifier) and GND.

You want that voltage (Voffset) to be rock solid, or else any induced noise or hum will go to the FET's gate and modulate the amplitude of the oscillations.




Adding extra 47uF over the already existing 0.1uF near each IC couldn't hurt either, not sure if this will make a measurable difference or not (unless there are ground loops in the PCB, I hope there aren't any).
« Last Edit: April 21, 2021, 01:51:34 pm by RoGeorge »
 
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Offline Vovk_Z

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Re: Wien Bridge project
« Reply #109 on: April 21, 2021, 08:24:49 pm »
Quote from: RoGeorge link=topic=269822.msg3553164#msg3553164
Do you have any link, or measurement charts of ASIO vs non ASIO noise/THD, please?
It is easy to measure. I'll take the screen a bit later.
My PC with a good sound card is remote now, so I can take only a noise measurement at the moment.
Possibly it is only for my sound card, but it is seen on the screen that WDM drivers stack somewhere at 16-bit depth. And there is no input signal. With a signal applied the screen becomes noisier and the THD becomes worse.

Sory for off-topic.
« Last Edit: April 21, 2021, 08:59:35 pm by Vovk_Z »
 
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Offline Vovk_Z

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Re: Wien Bridge project
« Reply #110 on: April 21, 2021, 08:29:48 pm »
I think the case is that a WDM driver _may_ resample the signal, but not necessarily so. I tested Audio Kontrol 1 with ASIO driver, a measurable but minimal difference. No difference between bespoke ASIO driver and ASIO4All. Balance ASIO driver won't work with Audiotester, but AAIO4All works. Again, a minimal difference. WDM gave THD 0.016-0.019%, ASIO gave 0.014-0.017%.
0.016% is quite a 'large' THD value. I'm talking about smaller values.
« Last Edit: April 21, 2021, 08:33:10 pm by Vovk_Z »
 

Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #111 on: April 21, 2021, 09:43:00 pm »
I'm getting somewhere. Oscillator RMS 0.775V, 0.0125% THD; 2nd and 3rd harmonics are both 82dB below the fundamental. But I made the asjustment margin on R10 too small; THD went down as I reduced the value of R10 until the minimum value of 95k. I'll have to make it adjustable further down, eg. to 75k, and see where that leads.

The 50Hz peak at -90dB plus the fundamental +/- 50Hz sidebands drop if I shield the PCB with my hands, so I expect these to be significantly reduced when I put it in a metal enclosure.

« Last Edit: April 21, 2021, 09:48:43 pm by richlooker »
 

Offline Vovk_Z

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Re: Wien Bridge project
« Reply #112 on: April 21, 2021, 09:48:22 pm »
One could consider adding some one sided loading to the OP, to make the output stage run in class A mode. This may reduce the distortion of the OP.
The distortion of LM6172 with a reasonable load (>100R) is much lower than 0.010 % (it is rather somewhere <=0.001%), so there is no need for a one-sided loading.
 

Offline Vovk_Z

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Re: Wien Bridge project
« Reply #113 on: April 21, 2021, 09:53:07 pm »
THD went down as I reduced the value of R10 until the minimum value of 95k. I'll have to make it adjustable further down, eg. to 75k, and see where that leads.
You may play with R9, R10 in a large range, I mean you may try R9 = R10 =10k, or even 1k both.
 
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Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #114 on: April 21, 2021, 10:42:40 pm »
You may play with R9, R10 in a large range, I mean you may try R9 = R10 =10k, or even 1k both.

Is there theory behind this, or just "play with"?

With R5 at 560 ohms, gain will exceed 3 and the oscillator will saturate when Rds and (R9 + R10) in parallel gets smaller than 1.4k. Plus, smaller R9 and R10 will attenuate the feedback signal from the TL081, further pushing the system towards saturation.

R4, R5 and R9 are carefully selected to minimize Vds while allowing enough (very small) gain control range. The only function of R10 is to feed back (ideally 1/2 of) Vd to gate, to eliminate the effect of channel modulation.
« Last Edit: April 21, 2021, 10:47:07 pm by richlooker »
 

Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #115 on: April 21, 2021, 10:49:41 pm »
I've seen on your breadboard (didn't had the time to look at the PCB version at all) there was no decoupling between the node named "Voffset" (the positive input of the U2 feedback amplifier) and GND.

You want that voltage (Voffset) to be rock solid, or else any induced noise or hum will go to the FET's gate and modulate the amplitude of the oscillations.

Thanks, a very good point, especially since the potmeter will be connected here via 12" unshielded leads. Ill add a couple of caps :)
 

Offline Vovk_Z

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Re: Wien Bridge project
« Reply #116 on: April 21, 2021, 11:29:08 pm »
Is there theory behind this, or just "play with"?
Possibly there is a theory, but I don't have it. :-) In this case, it's just an experience.
 

Offline Vovk_Z

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Re: Wien Bridge project
« Reply #117 on: April 21, 2021, 11:32:06 pm »
With R5 at 560 ohms, gain will exceed 3 and the oscillator will saturate when Rds and (R9 + R10) in parallel gets smaller than 1.4k. Plus, smaller R9 and R10 will attenuate the feedback signal from the TL081, further pushing the system towards saturation.
Of cause, there can be a need to decrease R5 too (or R3-R5).
« Last Edit: April 21, 2021, 11:35:13 pm by Vovk_Z »
 

Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #118 on: April 24, 2021, 05:03:32 pm »
With tweaking of resistors, and keeping oscillator output at 1V RMS, I managed to get THD down to 0.01%. But it should be possible to get much lower.

Jim Williams wrote:



From that I assume that this should be achievable on a solderless breadboard. As I had already built the oscillator from this article: https://sound-au.com/project174.htm

- I shortened all leads, fitted it with ceramic 100nF power bypass caps, and tested. Disappointing; 0.1% THD, way worse results than with my finished PCB.

I assume that harmonic distortion is mainly caused by semiconductors and other, nonlinear components. The parasitic resistances and capacitances on a breadboard may add (non-harmonic) noise, affect amplifier bandwidth and cause spurious oscillations, but not increase THD, right?

When it comes to the nonlinearities of a JFET, and in particular the channel-length modulation, I have only read that Vds should be kept as low as possible, but nothing about currents and/or whether some JFETs are better than others. Would I eg. gain anything by replacing the BF245C with a (genuine) 2SK170BL?

Next up is breadboarding of Jim Williams' final circuit:



I don't have a VTL5C10, only a DIY optocoupler, and I don't have the opamps he used, but I hope LM4671/4672 works all over.
« Last Edit: April 24, 2021, 05:17:34 pm by richlooker »
 

Online Kleinstein

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Re: Wien Bridge project
« Reply #119 on: April 24, 2021, 07:24:13 pm »
For the JFET choice it should help to have a symmetric fet - most if the JFETs are, but a few (espeically RF types) are not fully symmetric.
I would look for some with a relatively long channel, so more like types with with that much transconductance relative to the capacitance and probably more like high voltage types and not specially low noise low votlage ones (e.g. like SK3557)

The right choice probably also depends on the resistance range needed. The BF245 is more for higher resistance, a J113 ( ~2N4393) would be more like lower resistance.
The Fairchild AN6609 suggest  process 50 / 51 / 55 for vairable resistance. The BF245 is process 50, J113 / 2N4393 would be typical porcess 51.
A point is to keep the adjustment range from the fet small, which requites rather good matching of the capacitors / resistors to set the frequency.  If needed one could do some coarse trim with mechanical switches / relays or similar.
 

Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #120 on: April 24, 2021, 07:33:23 pm »
For the JFET choice it should help to have a symmetric fet - most if the JFETs are, but a few (espeically RF types) are not fully symmetric.
I would look for some with a relatively long channel, so more like types with with that much transconductance relative to the capacitance and probably more like high voltage types and not specially low noise low votlage ones (e.g. like SK3557)

The right choice probably also depends on the resistance range needed. The BF245 is more for higher resistance, a J113 ( ~2N4393) would be more like lower resistance.
The Fairchild AN6609 suggest  process 50 / 51 / 55 for vairable resistance. The BF245 is process 50, J113 / 2N4393 would be typical porcess 51.
A point is to keep the adjustment range from the fet small, which requites rather good matching of the capacitors / resistors to set the frequency.  If needed one could do some coarse trim with mechanical switches / relays or similar.

These are the ones I have at hand: 2N5458, BF256B, BF245C, 2SK170BL, 2SK81, J110
 

Offline David Hess

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Re: Wien Bridge project
« Reply #121 on: April 24, 2021, 07:36:50 pm »
I don't have a VTL5C10, only a DIY optocoupler, and I don't have the opamps he used, but I hope LM4671/4672 works all over.

Even when that was published, I could not get the VTL5C10.

The LT1006 is precision single supply, effectively a precision 324/358.  The LT1028 is fast precision low noise.  The LT1022 is fast low input bias current but since it is inverting, its common mode rejection is not important; it is suppressing common mode operation of the LT1028.  The LT1010 could be replaced by a diamond buffer.

I never understood why the LT1022 was used instead of another LT1028, but it was the fastest JFET part LT made at the time.  The newer and faster LT1122 should work as an improved replacement.

For the JFET choice it should help to have a symmetric fet - most if the JFETs are, but a few (espeically RF types) are not fully symmetric.
I would look for some with a relatively long channel, so more like types with with that much transconductance relative to the capacitance and probably more like high voltage types and not specially low noise low votlage ones (e.g. like SK3557)

The right choice probably also depends on the resistance range needed. The BF245 is more for higher resistance, a J113 ( ~2N4393) would be more like lower resistance.
The Fairchild AN6609 suggest  process 50 / 51 / 55 for vairable resistance. The BF245 is process 50, J113 / 2N4393 would be typical porcess 51.
A point is to keep the adjustment range from the fet small, which requites rather good matching of the capacitors / resistors to set the frequency.  If needed one could do some coarse trim with mechanical switches / relays or similar.

Or do what I suggested and add the common mode suppression from this circuit to the earlier circuit from Jim Williams which uses a JFET for gain control.  When he was designing these, he tested a circuit which corrected for the channel modulation of the JFET getting the distortion down to 0.0018%, but did not include common mode suppression like with the photocell version which got down to 0.0015%, an apples to oranges comparison.  The virtue of the optocoupler is that no adjustment is needed but it might not perform any better.
 

Online Kleinstein

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Re: Wien Bridge project
« Reply #122 on: April 24, 2021, 08:26:36 pm »
The common mode suppresion works for the OP, but does not change much for the FET or optocoupler. In the simple circuit the JFET is relative to ground. In the 2 OP version the FETs is with one end at a virtual ground - so not much change.

 

Offline David Hess

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Re: Wien Bridge project
« Reply #123 on: April 24, 2021, 08:44:43 pm »
It has been so long that I have looked at it, 20+ years, that I forgot that, and forgot that I had a plan to get around it by making the JFET gain control floating.  But you are correct, that is obviously why Jim Williams did it that way.

Incidentally, I was looking at the LT1122 datasheet and they do recommend it as an improved replacement for the LT1022 in this application.

And I am sure someone else mentioned it but I will again, figures 47 and 48 are swapped in the application note.
 

Offline richlookerTopic starter

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Re: Wien Bridge project
« Reply #124 on: April 24, 2021, 10:22:02 pm »
For the JFET choice it should help to have a symmetric fet - most if the JFETs are, but a few (espeically RF types) are not fully symmetric.
I would look for some with a relatively long channel, so more like types with with that much transconductance relative to the capacitance and probably more like high voltage types and not specially low noise low votlage ones (e.g. like SK3557)

The right choice probably also depends on the resistance range needed. The BF245 is more for higher resistance, a J113 ( ~2N4393) would be more like lower resistance.
The Fairchild AN6609 suggest  process 50 / 51 / 55 for vairable resistance. The BF245 is process 50, J113 / 2N4393 would be typical porcess 51.

I will try with J110, which according to the datasheet is drain/source symmetrical (the BF245 is apparently not)

A point is to keep the adjustment range from the fet small, which requites rather good matching of the capacitors / resistors to set the frequency.  If needed one could do some coarse trim with mechanical switches / relays or similar.


I ensure _very_ good matching of the timing capacitors/resistors; only 1% components, but I also measure a handful of each and select pairs which differ less than 0.5%. And I have chosen the neg feedback resistors to minimize the adjustment range for the JFET; if the JFET had Rds(on) = 0, the minimum gain would be 1 + 12k/5.6k = 3,143 - this should be high enough that even with reduced opamp open loop gain at 100kHz the gain should be above 3, enough to ensure oscillation. With the JFET fully off, the gain is 1 + 12k/(5.6k + 0.56k) = 2.948 - low enough to ensure no oscillation. 5.6k + 0.56k is chosen to keep the voltage over the JFET as low as possible; it should be about 1/30 of the opamp output swing.

Or do what I suggested and add the common mode suppression from this circuit to the earlier circuit from Jim Williams which uses a JFET for gain control.  When he was designing these, he tested a circuit which corrected for the channel modulation of the JFET getting the distortion down to 0.0018%, but did not include common mode suppression like with the photocell version which got down to 0.0015%, an apples to oranges comparison.  The virtue of the optocoupler is that no adjustment is needed but it might not perform any better.

I have not figured out how to make the JFET VGC floating, but I would be more than happy to achieve the 0.0018% THD Williams did with ground-referenced VGC.
 


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