The PC UART (or adapter) will have buffers which you wownt overflow easily.
The first problem is making sure youre always consuming the bytes that are being sent to the PIC. So if you store the bytes, or do any frame parsing off the line, what do you do when youve received a valid message? If your busy processing that message, is there another buffer to consume bytes? A simple double buffer may well suffice; you fill one, process the other...etc.
Ive implemented manual flow control a couple of times. Its a case of making sure that the point which is most likely to fail triggers RTS (output) when there is no more capacity in the system. In my case I had high and low watermarks on an array of buffers such that it would switch on and off RTS.
When the host asserts RTS and the PICs CTS triggers (GPIO interrupt), you stop TX UART interrupts which stops the PIC sending bytes. However, you need to make sure that your internals can cope and there is adequate buffering to prevent the whole system backing up.
Both sides need to cope with the maximum number of bytes for latency just after an RTS hold off. You can calculate this given the line rate.
I would use a serial monitor to see whats going on. A logic analyser, scope with serial debug, or PC based monitor such as:
http://www.hhdsoftware.com/Downloads/serial-monitorGet you PIC comms working 100% first. You can use Realterm
http://realterm.sourceforge.net/ or similar to dump the contents of a test file at the target to make sure it doesnt fallover or loose bytes.