Closing the Loop on discrete Class-D Power Stage

[Evan.Cornell]

I have attached an LTSpice simulation of analog-to-pwm converter with ideal power stage.

The analog-to-pwm converter was inspired by this TI app note: https://www.ti.com/lit/ug/slau508/slau508.pdf

What I'd ideally like to do is close the overall feedback loop of the system from the output of the Class-d LC filter, but am having trouble doing this properly.. anyone have any ideas here?

[CaptDon]

Have you built this thing? That final output stage usually doesn't work efficiently because of the turnoff delays of the power FET's. They turn on extremely fast but turn off more slowly and you end up with both conducting for a period of time and get high shoot through current spikes. There are often 1 diode, 1 or 2 resistors and a capacitor on the gate circuit of each FET to modify the timing or a scheme using 2 comparators and biasing them to produce a 'dead band' near zero crossing to eliminate the shoot through. The output LC circuit and feedback control the zero crossing distortion although it should be remembered the zero crossing distortion occurs at switch frequency and not at the audio frequency which at 500Khz switching speed would be 1/25 of 500Khz. Also, that simple circuit is usually built with a P-Channel and an N-Channel FET and with the gates direct connected to each other generally mandates a final supply voltage of less than 20vdc.

[SiliconWizard]

Surely the above is pretty basic "textbook" stuff, and is not particularly efficient or low distortion. But that doesn't answer the OP's question.

You can start here: https://www.maximintegrated.com/en/design/technical-documents/app-notes/3/3977.html
and see the "Using Feedback to Improve Performance" paragraph.

[Evan.Cornell]

The power stage in the simulation is idealized and doesn't include gate drivers (with deadtime control) and real switches, as the actual built design does.

The current circuit has feedback path from low-level PWM output that drives the gate drivers back to error amplifier, but what I need to have is feedback path either from prior to LC filter or post-filter to correct for power stage dead-time distortion and power stage supply fluctuations. This is the part I need help on..

[CaptDon]

The feedback sample taken from one side of your 'bridged output' would wrap back around and be applied to that second opamp that already has a bit of a linearizing feedback circuit in the original layout. I don't have any exact component values or diagram for you, but it would be negative feedback slightly reducing overall gain and for my money I would be slowly sweeping the circuit without the extra feedback in place to see how bad the first design build really is and then start adding some negative feedback a little at a time to see if things get better or quickly go bad do to phase instability. I love class D amplifiers and all of mine are over 1KW RMS output with a remaining 400W of headroom at 8 ohms. The rails are + and - 160vdc and I can push 300vpp into a dummy load all day long without anything blowing up. Makes me laugh at these "8 kilowatt Musysic" amplifiers that have a 10 amp line fuse and sell for $199. What a joke they are! Anyway best wishes. Simulating these class D circuits barely scratches how they will perform in the real world and speaker impedances vary wildly. An 8 ohm speaker will generally have peaks over 40 ohms near the self resonant point.

[Evan.Cornell]

I think the main issue for this actually is that I've got unipolar supplies throughout - it's fine for the existing feedback path on the analog-to-pwm conversion circuit because I have a precision mid-rail reference to bias things up. However, when I do try and wrap feedback from the output of the power stage, the DC biases are off, and then the output signal ends up offset from mid-rail.

Does anyone have any general tips/ideas about how to deal with multiple DC biases throughout an amplifier signal chain with different supply voltages?

[CaptDon]

You can surely A.C. couple the negative feedback which will leave the D.C. component undisturbed.

[CaptDon]

Maybe download some schematics of off-the-shelf store bought class-D amplifiers and see how they do it? Peavey DECA 724 or DECA 1200 come to mind. You are creating your own hurdles then asking for help to solve the problems. There are dozens of class-D power amps on the market, many with schematics available online. Why re-invent the wheel? I have personally been involved with the class-D switching in audio amps and 5KW broadcast transmitters since the 1980's. I think the Peavey DECA's have been on the market since that time. The first 700's kept blowing up and gave a bad rap to Peavey class-D but later the 724's, 524's and 1200's were solid as a rock and the main workhorse of many bands and D.J.'s.
Simulation of class-D amplifiers is almost useless. Getting the smallest dead-band without shoot through across all temperatures and loads is nearly trial and error black magic and all the tweaks occur in the real world and not in a sim. Also the sim will not predict all of the weird spikes from the output L/C filters and even the circuit board layout that will all combine in random ways to make carbon dust out of your mosfets and snubbers.
Best wishes however since you are doing this to learn and it will open many doors of knowledge. The magic smoke pouring out of the DECA 700's put the Peavey engineers on a knowledge gathering path! And they succeeded with a respected product after a failure.

[Evan.Cornell]

I'm having trouble properly getting output stage feedback loop, I think because the analog-to-pwm section is 2.5V-centered, and the output stage is 18V-centered. Just whacking a series ac coupling cap in there does not produce the desired result and just makes each half bridge go to opposite rails.. I have seen several different discrete class-D designs that are bipolar, thus avoiding this issue because everything is GND-centered, but then that creates the need for bipolar power supplies. Hence the desire to close the loop with unipolar...