Recent Posts

1

Projects, Designs, and Technical Stuff / Re: Cell charger and LDO with minimal leakage current

« Last post by mariush on Today at 04:58:56 am »

A quick google search came up with Hycon HY2112  : https://www.lcsc.com/search?q=hy2112

See example circuit at page 10 : https://www.lcsc.com/datasheet/lcsc_datasheet_1810010241_HYCON-Tech-HY2112-BB_C161942.pdf

I'm sure there's others that are just as good or similar.

2

Microcontrollers / Re: Routines to convert binary to BCD in C code

« Last post by T3sl4co1l on Today at 04:58:19 am »

The best illustration of a similar issue I know of, is Radix-sorting IEEE 754 double-precision floating point numbers (double).  When their byte order is the same as unsigned integers, one only needs a preprocessing pass of flipping all bits if the sign bit is set, or only the sign bit if it is not set, to make all finite values sort in the same order as the 64-bit unsigned integer representation (after the bit flipping).  Depending on the L1-cache/D-cache size, you do four to eight passes, plus the final unflipping-bits pass.  This scales linearly: as it is a radix sort, it indeed sorts the finite floating-point values in O(N) time complexity.  However, its cache footprint is horrible, evicting basically everything else from the L1/D-cache, so using it slows all other code running after the sort, because it ends up having to refill the cache.  Thus, you need to have hundreds of millions of numbers or more, before it ends up being faster/better than QuickSort and other O(N²) and O(N log N) time complexity (but typically fast) sorting algorithms.  And if the other stuff is cache-sensitive, maybe not even then; while the sort may be done faster, the other code needed to do the actual real-world task may take correspondingly longer time (due to the cache misses).  (Similarly, when multiplying a pair of dense matrices, you don't need very large matrices before it becomes worthwhile to copy the data so that they are both accessed in as compact order as possible, for maximum cache locality.)

Related perspective shift: CPU time is essentially free these days, and often this is the case on more historic platforms too (most anything with slow RAM, caches, etc.).  Doing float comparisons might be relatively onerous in raw cycle count (depending on platform; they've certainly improved over the years), and the integer hack is so greedily tempting.  But if you're spending all your time fetching and storing, that... doesn't matter at all.

Tim

3

Buy/Sell/Wanted / Re: GPIB Breakout Board

« Last post by oPossum on Today at 04:56:53 am »

It plugs directly into the HP Logic Analyser cable so no messing around with individual probes. 

This may damage the logic analyzer (4V max typical). There must be a proper 10:1 termination network on your PCB or use a HP/Agilent 01650-63203
Termination Adaptor.

4

Beginners / Re: Help identifying these possibly RF/Microwave components?

« Last post by T3sl4co1l on Today at 04:52:30 am »

The diversity of spirals suggests tuned RF inputs; perhaps it's a mixer, with LO, RF (left, up/down take your pick) and IF (right).  Seems differential, and I wonder if the thin traces connecting pad pairs might be diffusion resistors for termination.

Would need better photos -- or more destructive testing, i.e. etch the oxide and top metal layers off -- to see what kind of functionality is underneath.  Could well be some GaAsFETs or schottky diodes on there.

Tim

5

Projects, Designs, and Technical Stuff / Re: Reverse-engineering misc. avionics (ongoing)

« Last post by T3sl4co1l on Today at 04:48:58 am »

I wonder if a lot of those inputs might be LVDTs and resolvers; they're common/traditional in aircraft, 16-bit would be needed for positional accuracy, and spread across so many inputs, 200kSps is probably fine for sampling 400Hz or so signals.  Some DSP functionality, or relatively powerful CPU, would be desirable to handle the "complex" (read: AC phase) calculations.

I'm not offhand familiar with what input structures are used with this; it's plausible that a simple resistor divider, clamp diode and RC filter would do.  It could be various other level or signal inputs, of course.

Tim

6

Projects, Designs, and Technical Stuff / Re: Webench Help - 5V buck mode supply

« Last post by mariush on Today at 04:44:37 am »

You can get higher efficiency with regulators optimized for lower currents and which run or can be configured to run at lower switching frequencies.
I gave you links to very cheap and high switching frequency as you save money in both the chip and the cost of inductors and everything.

There are better chips that cost a bit more, for example this one's around 2$... see MP9841 or MPQ9841 (the automotive qualified version) : https://www.digikey.com/en/products/detail/monolithic-power-systems-inc/MP9841GL-Z/14645652

See graphs at page 8, you have 12v->5v @500kHz and 12v->5v @1 Mhz and also 12v->5v at ultra light load (<10mA) graphs : https://www.monolithicpower.com/en/documentview/productdocument/index/version/2/document_type/Datasheet/lang/en/sku/MP9841GL/document_id/9095/


It can be configured to as low as 300kHz and will be nearly 95% efficient when running at 500kHz

Also, yes you may get 97% peak efficiency but you'd pay something like the 9$ for it - those extra 5-7$ you'd pay could be used somewhere else, depending on your design. For example 5$ may double the battery capacity, which would give your product more battery life than that extra 3-5% efficiency could give.

7

Test Equipment / Re: FNIRSI-1013D "100MHz" tablet oscilloscope

« Last post by Atlan on Today at 04:36:29 am »

Set 7.5V on both channels, (On the measured CH1 and CH2 values Vpp, Vmax Vmin Vavg) connect DC voltage, press autoset (OLD version). Check the AVG value and write it here. Open the channel menu, highlight AC and then back to DC (don't leave the channel menu). Exit the channel menu, and check the AVG value again. Make video.

But it does not meet the conditions, written above.

8

Metrology / Re: Digitec United Systems Corporation 262B Multimeter Repair

« Last post by emanarias on Today at 04:36:24 am »

The ICs marked 996079 are Fairchild 960 decimal decoder and driver.  Similar to, but a different pinout from, a 74141

995879 are Fairchild 958 BCD Decade Counter with Reset, comparable in function to a CD4510

I have the manual to this meter, and can scan it if you would like.

9

Microcontrollers / Re: $0.11 PY32F002A: Cortex-M0+ MCU, actually a PY32F030! 32/4KB, 48MHz, PLL, DMA...

« Last post by John_doe on Today at 04:35:24 am »

The chip is gone if you reassign both SWC/SWD and NRST.
If you have SWC/SWD reassigned, but NRST is still available, you can still flash the chip if you pull NRST low (which forces the SWC/SWD pins to get reassigned to defaults).

Thanks for the useful tip! I tried it, that is, pinMode() for both the SWD and SWC pins and indeed couldn't connect to the chip anymore. Holding NRST low (and releasing it after the command "reset halt") worked like a charm!

Thanks for the write up. I was excited about openocd for the PY32.... but there's (still) no source and no linux version. Ah well.

Wait, so the PY32 support of openOCD is built into the executable? I didn't know that... I thought that if you download the official Linux version and add the *.cfg files to it from the gitee archive it'll work.

Also may be worth noting: beyond openocd and pyocd, there's also probe-rs which supports the py32.

Thanks, right now I got myself busy with something else but when I'll return to the PY32F002A project I'll be sure to try probe-rs.

10

Programming / Ticketing seat allocation problem

« Last post by cfbsoftware on Today at 04:32:25 am »

My partner and i recently attempted to purchase two tickets to a show but the ticket booking software would not allow me to select my preferred seats (N9 and N10 in the attached seating plan)

because that would have left one isolated seat (N11).

In my opinion, while I can accept that it might be desirable to minimise the creation of multiple isolated seats in a row, the application of this rule in this particular scenario is not sensible. It leads to the following consequences:

The seats in row N in the centre section can only be sold in the following circumstances:

1.   A single person can book seat N9 or N11 (but not N10). Then two people like ourselves would be able to book the remaining 2.
2.   A single person can book seat N9 or N11, but then another single person could not book one of the remaining two seats.
3.   Three people can book seats N9, N10 and N11 if they buy them at the same time.

Similarly for rows O and P.

Worse still, nobody can buy eight tickets in row R as that would also leave one isolated seat

I suspect that the requirements that were given to the programmer were too simplistic. Given the following definitions:

• nIsolatedSeats     = the number of empty seats in a row that are not next to an empty seat
• nOccupiedSeats   = the number of seats in a row that are not empty
• nRequestedSeats = the number of adjacent seats requested in the current booking. Can't be greater than the number of adjacent empty seats.
• nEmptySeats       = nOccupiedSeats - nRequestedSeats = the number of empty seats remaining if the current booking is confirmed

The current algorithm appears to be something like:

Code: [Select]

AllocateSeats(nRequestedSeats)
if (nIsolatedSeats > 0) then RejectBooking else ConfirmBooking
My preferred solution that would avoid the questionable situations described above would be:

Code: [Select]

AllocateSeats(nRequestedSeats)
if (nEmptySeats > 1) and (nIsolatedSeats > 0) then RejectBooking else ConfirmBooking

Am I on the right track?