Author Topic: Buck converter efficiency - Fet Rds, max current, inductance - tradeoffs  (Read 1617 times)

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Offline snoop33

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Hi all,

I think I know the answer to this one but wanted to double check.

I have a sync buck with 2A rating with 180mOhm high side and 120mOhm low side fets (both nmos, don't know why they're different but they are). The default frequency is 1MHz but is adjustable down to 300KHz. The default inductor is 4.7uH at 1MHz with an on the larger side of 44uF capacitance.

Now this application will never pull more than 1A and has a 4030 footprint inductor. At 4.7uH a Coilcraft XEL4030 has an Isat of 4.6A, way above the max + ripple of say 30%, and DCR of 42mOhm. Thus I'm immediately thinking if I want to optimise the efficiency of this application I should be looking at an inductor around the 10uH mark, which will have higher DCR but which is worth it for the efficiency gains in the buck converter. A Coilcraft XGL4030 10uH has an ISAT of 1.4A (perfect), DCR of 65ohm. This will take the buck frequency down to around 500KHz.

In other words what I'm asking is to optimise one should first look to increase the inductance keeping in mind the max saturation point to lower the buck frequency. Ripple at the input/output may go up and may need additional capacitance. This is especially the case when the FET's have a relatively high Rds. Correct?
 

Offline Siwastaja

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Re: Buck converter efficiency - Fet Rds, max current, inductance - tradeoffs
« Reply #1 on: November 23, 2021, 07:57:14 pm »
This is a complex optimization problem with no generic catch-all answer. Made somewhat simpler by the simplicity of the buck topology.

Basically, given some input/output voltage/current requirements, you have two knobs to adjust: ripple current % and f_sw. Then you can of course choose any component out of the available gazillion parts. Luckily we have just five basic parts: input and output caps, the inductor, and the two switches.

Lower frequency
-> less switching loss
-> less core loss
-> higher inductance required for same ripple current -> longer winding -> higher Rdc

Lower current ripple
-> less core loss
-> higher inductance required for same f_sw -> longer winding -> higher Rdc

Lower Rds_on MOSFET
-> higher Qgtot, slower switching, higher Cds -> more switching loss


Often this means finding a sweet spot (for example, choose MOSFET so that the sum of switching loss and conduction loss is minimized; don't go for the absolute lowest possible Rds_on!) OTOH, actual parts on the market don't fit in such simple line, you may be able to find a part which has both lower switching and conduction loss than the alternative, by just getting a better, more modern part.

If you can arbitrarily choose the solution size, going lower in frequency tends to increase efficiency, at the cost of increased inductor and capacitor size. In other words, by increasing inductor size, you can get more inductance without sacrificing Rdc.

Although if low f_sw forces you from MLCCs to electrolytics, then your capacitor ESR loss goes up again.

You may find diminishing returns below 500kHz, for example.

OTOH the points I listed above, while true in the strict sense (lower frequency -> less core loss), lack the information by how much. Some crappy powdered iron core might jump into ridiculously high core losses already at 500kHz, while another core (some type of ferrite, for example; even ferrites are not all the same!) might happily run at 1MHz with so little core loss that Rdc dominates by an order of magnitude. Some core materials just are so good the selection is mostly Rdc limited; but this always isn't the case, so look up interactive power loss calculators at the inductor manufacturer websites, they'll give you core loss (and total AC loss) with your buck parameters. If such calculator isn't available, you have to design by luck and just need to measure.

It makes no sense to optimize something that is already quite good, instead focus on what performs poorly. You can get the first-order estimate by touching different components to find which runs hot. This isn't always obvious. For example, the power loss in the input caps of buck surprises people time after time.
 

Offline snoop33

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Re: Buck converter efficiency - Fet Rds, max current, inductance - tradeoffs
« Reply #2 on: November 24, 2021, 03:36:21 pm »
The solution size is fixed at a 4mm^2*3mm height inductor, banks of MLCC's on the input/outputs. At this point all I can change are the inductance and buck frequency.

I'm measured the input and output ripple and it's low, impressively so, and I expect going from 4.7uH to 10uH won't make a big impact there. Assuming I go with Coilcraft inductor quality should be assured and the 10uH part is well within the max current + ripple point.

I have a thermal imager on the way as like you say it may be the best way to optimise further. I've no performance issues with 4.7uH & 1MHz just attempting to perform the final optimisation and squeeze the last drop out of the design.
 

Offline Siwastaja

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Re: Buck converter efficiency - Fet Rds, max current, inductance - tradeoffs
« Reply #3 on: November 24, 2021, 04:59:12 pm »
Well, larger inductance in same package size / same inductor series means more Rdc loss, but less core loss because of smaller delta B (change in magnetic flux density during switching cycle). But core loss is always a huge question, it might be so low to begin with there is no significant difference, and the increased Rdc could cause a significant efficiency drop. Or, maybe this particular core material benefits from smaller delta B to the point of efficiency increasing despite more Rdc loss?

By using larger inductor, ripple current is smaller, hence given same output capacitors, ripple voltage is also smaller, and also the converter runs in CCM at lower loads. With a suitable load, this would mean lower noise, which could be important. But efficiency could be lower.

For efficiency, there again is some sweet spot in current ripple, efficiency being reduced in either direction. But we don't know at which side you are on this curve.

If you only change one component at the time, you can just measure the efficiency between the iterations. Just need a test setup with good repeatability, including stable dummy load.

Note that if enough reactive power goes in the wiring, the capacitors of the supply / load become parts of the circuit, affecting the efficiency, and also making measurement more difficult.
« Last Edit: November 24, 2021, 05:02:14 pm by Siwastaja »
 

Offline Faringdon

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Re: Buck converter efficiency - Fet Rds, max current, inductance - tradeoffs
« Reply #4 on: November 24, 2021, 08:07:54 pm »
Quote
so look up interactive power loss calculators at the inductor manufacturer websites, they'll give you core loss (and total AC loss) with your buck parameters.
Well said Siwastaja, i totally agree.
With those coilcraft parts , you can definetely get your core loss and windings resistance loss.
You really should deffo do this.
Indeed, if there is no online calculator, then pick an inductor that has a calculator for your core and windings loss.
Coilcraft and vishay and others have core loss calculators, deffo.

I trust also that you have a schottky across your low side fet...for those little intervals when the fet turns off.
What is your vout/vin?
Make sure you dont have shoot though due to eg spurious on turning of  the lower fet when the high side fet turns on...you can solve this by suitably slowing down the on turning of the high side fet, and by having a low impedance off drive for the low side fet.

Bear in mind that if you are using a controller with on_board slope compensation, then you may find that if your duty cycle is greater than 0.5, you will have to choose a higher inductance inductor in order to avoid subharmonic oscillation......often, the supplied slope compensation isnt much, and you need to have say just 12% or so ripple in the inductor current....dont make the  current ramp too low in gradient though, as otherwise your current sense may trip prematurely every now and then and cause noisy operation.

I assume its a current mode buck.?

Is it one of those linear.com bucks? (now analog.com)
Which controller do you use?

Are you isng the little QFN  FETs, and how have you provided thermal situation for them....thermal vias to bottom layer copper? Beware, the source of the top fet is a switching node, and the drain of the bottom fet is a switching node...you need to minimise their area so as to pass EMC.....But not so little that you fail thermal.

Good idea with the thermal cam....get one with a "highest temperature fix" feature, then you can find the hottest bit even if your hands cant hold the cam totally still.
Seriously, i reckon without "highest temperature fix"...then a thermal cam is  rubbish for use with electronics.

If your duty cycle is low, then the rds of the top fet is not so important......

If your controller only gives low voltage gate drive, then ensure your fets can be fully driven on by that low voltage

Quote
By using larger inductor, ripple current is smaller, hence given same output capacitors, ripple voltage is also smaller, and also the converter runs in CCM at lower loads. With a suitable load, this would mean lower noise, which could be important. But efficiency could be lower.
I woudlnt be sure that a ccm buck is  "always" less noisy than a DCM buck.....after all, in CCM, the low side parallel diode gets  slammed off by the sudden oncoming of the top fet, so this is quite an EMC_noisy event....with DCM, the top fet turns on after the low side diode has no current flowing in it...

..Which brings up another  point...in deep DCM, the buck shoudl have a way of knowing to turn off the low side fet just after the current in it has finished flowing...otherwise, there is a chance of getting high backflow of current in the inductor in terms of light load....and this could possibly saturate the inductor, but its likely that your controller deals with this.
...having said that, there are actually  synch bucks which always have current flowing in the  inductor (except at zero crossings)..and when you are on no load, the current flows
 (sloshes) backwards and forwards in the inductor.
« Last Edit: November 24, 2021, 08:43:10 pm by Faringdon »
 

Offline snoop33

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Re: Buck converter efficiency - Fet Rds, max current, inductance - tradeoffs
« Reply #5 on: November 25, 2021, 07:31:51 pm »
Hmm my post disappeared.

It's a TS30041. So far I've recorded 23c at 13c ambience at both the chip and the inductor at 5V/600mA from 8V. That's not much so efficiency is high. The PCB is very small, 13mmx25mm, 4 layer and the chip has thermal vias to it's base. If I had to guess the inductor might be dissipating a little extra heat but not much.

The datasheet discusses a low side diode to improve efficiency. I tested and found efficiency appeared to go down slightly, but within the variance of the measuring equipment. There certainly wasn't any improvement.
 

Offline Faringdon

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Re: Buck converter efficiency - Fet Rds, max current, inductance - tradeoffs
« Reply #6 on: November 25, 2021, 10:19:18 pm »
If your low side fet has a very fast diode in it, then the added schottky may not help that much.......remember if you do use a low side schottky, make it a low current one, with low capacitance. As you know, it will hardly conduct for very long at all. A hiigher current, higher capacitance schottky will deffo reduce efficiency.
 

Offline Faringdon

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Re: Buck converter efficiency - Fet Rds, max current, inductance - tradeoffs
« Reply #7 on: November 25, 2021, 10:37:40 pm »
Quote
The default frequency is 1MHz but is adjustable down to 300KHz.
Thanks...but i did not see this in the TS30041 datasheet

https://semtech.my.salesforce.com/sfc/p/#E0000000JelG/a/44000000MCKd/ChbGW3kEg0U2qe8.cVoJ9j.M_OMrg2zcXHSLcvTHxkA

...it says its fixed at 1MHz +/- tol of 10%

I see the TS30041 has a max vds of 42v....as such, if you use an LC input filter...beware about applying say  vin>22V as a sudden step input...because the input LC will ring up and apply >42V (as a short pulse) to the internal fets, which wont do them any good.
« Last Edit: November 25, 2021, 10:40:07 pm by Faringdon »
 

Offline snoop33

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Re: Buck converter efficiency - Fet Rds, max current, inductance - tradeoffs
« Reply #8 on: November 26, 2021, 01:49:53 pm »
Frequency is adjustable by the sync pin. I'm hoping I can revert to a high signal afterwards but they haven't responded (datasheet is a bit crap in places).
 


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