DIY Supercapacitor bank cell autobalancing

[Faranight]

Hello, first time meddling with supercaps.

For the love of god, I couldn't find a satisfactory supercapacitor bank for a decent price, so I decided to roll my own. I found some reasonably priced single-cell 2.7V 100F supercaps that I plan to connect in series to get a 4-cell bank with 25F at 10.8V nominal. While researching the subject, I found out it's a good idea to also use some balancing circuitry as it can significantly extend the lifetime of the caps. I read that the simplest way is to add 100k resistors across the cells, but the drawback is a "high" leakage current. Another option are zener diodes, but I'm having trouble finding some with correct specs. Finally, the last and probably the best option are FET's that open once the voltage exceeds their threshold.

I learned about the ALD810027 supercap balancing mosfet bank, and it seemed like a perfect solution until I saw the 80mA Ids(ON) maximum current limit in the datasheet. I'm planning to charge the bank with a solar MPPT charger, thus, the bank will be optimally charged with a constant power of about 500 mW. Since Power=Voltage*Current, the current at near full charge voltage (10.8V) will be about 46 mA, which is totally fine. But at voltages lower than 6.25V the charging current will exceed the maximum allowed current of ALD810027 (6.25V * 80 mA = 500 mW). I'm a bit stuck here and I'd like some advice what to use since I don't want my project to end up in fireworks.

Thoughts?

[Shonky]

4 x 100k across 10.8V is only 27uA. Is that really a problem? Time constant is 10 "megaseconds"....

[mtwieg]

Recently been designing a large supercap bank myself so I'll toss in my 2c:

For the love of god, I couldn't find a satisfactory supercapacitor bank for a decent price, so I decided to roll my own. I found some reasonably priced single-cell 2.7V 100F supercaps that I plan to connect in series to get a 4-cell bank with 25F at 10.8V nominal.

Maybe you saw this already, and not sure what a "decent" price is for you, but a couple of these Tecate modules in parallel would be roughly equivalent:
https://www.tecategroup.com/store/index.php?main_page=product_info&products_id=1354

While researching the subject, I found out it's a good idea to also use some balancing circuitry as it can significantly extend the lifetime of the caps. I read that the simplest way is to add 100k resistors across the cells, but the drawback is a "high" leakage current. Another option are zener diodes, but I'm having trouble finding some with correct specs. Finally, the last and probably the best option are FET's that open once the voltage exceeds their threshold.

I learned about the ALD810027 supercap balancing mosfet bank, and it seemed like a perfect solution until I saw the 80mA Ids(ON) maximum current limit in the datasheet. I'm planning to charge the bank with a solar MPPT charger, thus, the bank will be optimally charged with a constant power of about 500 mW. Since Power=Voltage*Current, the current at near full charge voltage (10.8V) will be about 46 mA, which is totally fine. But at voltages lower than 6.25V the charging current will exceed the maximum allowed current of ALD810027 (6.25V * 80 mA = 500 mW). I'm a bit stuck here and I'd like some advice what to use since I don't want my project to end up in fireworks.

Ok so your charger is power-limited, so at lower cap voltages the output current will be higher. But the active balancing circuits will not actually conduct in until they reach their threshold, which I assume will only happen when the bank is near the rated max voltage (10.8V). So no worries so far.

But the above assumes that the cells are balanced to begin with. If, somehow, you had once cell reaching 2.7V while the others were still at <1V, then that cell's balancer would have to conduct all the charging current to prevent it from overcharging, which could burn that balancer. But assuming the balancers do their job under normal conditions, such a huge imbalance should never occur in the first place. Sort of a catch 22, but that's how these things are.

I would typically use some amount of passive balancing resistance in addition to active balancing, if your application allows for the extra self-discharge current they cause.

[Siwastaja]

4 x 100k across 10.8V is only 27uA. Is that really a problem? Time constant is 10 "megaseconds"....

That's one question, but the other is, can 100k keep the caps in balance, even during high-current charge (maybe just some seconds to minutes)? It should not only account for differences in self-leakage, but also differences in capacity. I would say no.

Supercap bank is expensive in any case, so you want to maximize energy storage, which means you maximize voltage. For that, you need a proper circuit which can shunt large currents away from the cell.

[Faranight]

Yes, that's exactly the issue I saw about resistors not being able to sufficiently balance the cells during high-current charging/discharging. That made me question the resistor approach and look for alternatives.
I also agree on the ALD810027 balancer, that one of the cells would have to be terribly out of balance for the overload scenario to occurr during charging or discharging.
Not to mention I'm stuck at using a small solar panels. I couldn't find a stronger version of that IC, but I did find an interesting topic on this forum.

EDIT: Someone said I could use two ALD810027 wired in parallel to increase the current limit.

mtwieg: I did not find the Tecate modules (its price isn't decent though), but I found this one instead which is somewhat similar.
Still, 4 of the supercaps from my first post look the cheapest option for the given performance (about 23 EUR + VAT for 25F @ 10.8V).

[Siwastaja]

Also note that rather than balancing, monitoring of each cell voltage and then controlling the charger (i.e., temporarily stop it if one cell is close to exceeding the limit) does the job. This is how we tend to do things in battery world, balancers are either not used at all, or are orders of magnitude too low in power to be able to shunt away the charging current; instead, one cell getting too high turns the charger off. Then balancing is a secondary function, slowly maximizing the energy storage. You can do the same in ultracaps, for example just build a comparator+reference circuit for each cell, which triggers on overvoltage. Easiest (if not absolute cheapest) way to level-shift the "turn off" command are some optocouplers. Add hysteresis, and then the very same optocouplers would also consume charge from the cells, balancing them! Effectively, charging the whole pack slows down at the end.

[Faranight]

Siwastaja: Do you have a reference design/implementation I can study and adapt/work on?

[NiHaoMike]

You can get 4S balancer board that automatically works when it detects an imbalance.

[Siwastaja]

Siwastaja: Do you have a reference design/implementation I can study and adapt/work on?

Sorry, not at hand, you have to keep looking.

[mtwieg]

Yes, that's exactly the issue I saw about resistors not being able to sufficiently balance the cells during high-current charging/discharging. That made me question the resistor approach and look for alternatives.
I also agree on the ALD810027 balancer, that one of the cells would have to be terribly out of balance for the overload scenario to occurr during charging or discharging.

Yeah most balancing circuits are only handle enough current to counteract imbalance in leakage current between cells, which is what determines voltage imbalance at steady state. When charging/discharging the cap bank with high currents, voltage imbalance is determined by capacitance imbalance between cells (cells with lower capacitance will change voltage faster than other cells).

I talked to a couple major vendors about how to deal with this and they basically shrugged their shoulders, didn't seem to think it was ever an issue in practice, even though some of their caps have tolerance in the range of +/-30% (maybe the cells that do see overvoltage during such conditions act as clamping devices during these transient conditions, and the banks aren't cycled often enough to affect overall life time?). Only recommendation they really gave was to assemble banks out of caps from the same lot so that the matching within the bank is much tighter.

Also note that rather than balancing, monitoring of each cell voltage and then controlling the charger (i.e., temporarily stop it if one cell is close to exceeding the limit) does the job. This is how we tend to do things in battery world, balancers are either not used at all, or are orders of magnitude too low in power to be able to shunt away the charging current; instead, one cell getting too high turns the charger off. Then balancing is a secondary function, slowly maximizing the energy storage. You can do the same in ultracaps, for example just build a comparator+reference circuit for each cell, which triggers on overvoltage. Easiest (if not absolute cheapest) way to level-shift the "turn off" command are some optocouplers. Add hysteresis, and then the very same optocouplers would also consume charge from the cells, balancing them! Effectively, charging the whole pack slows down at the end.

This is definitely another viable approach, where instead of regulating the total bank voltage, you regulate the voltage of the cell with the most voltage. When initially charging, the bank voltage might end up being lower than nominal, but eventually the balancers will even out the cells and the bank voltage rise back up.

Though doing it with hysteresis may or may not be a viable method, depending on the application. I tried to find a circuit to derive the max cell voltage to use as feedback to the charge controller, but couldn't find an elegant way which didn't involve lots of precision op amps and resistors. Might have been ok for four series cells, but I had >14 so the amount of circuitry to implement was unacceptable.

[f4eru]

When charging/discharging the cap bank with high currents, voltage imbalance is determined by capacitance imbalance between cells (cells with lower capacitance will change voltage faster than other cells).

Yeah, but it is not important.
supercaps have probably 10% imbalance in capacitance, when taken from the same lot,  so the simple solution is to take 10% voltage margin, and that is it.
You probably should take more voltage margin anyway, because voltage is a huge influence on supercap lifetime.

Why do we use resistive balancing for batteries and supercap leakage currents, and not for capacitance imbalance ?
-> simply, because capacitance imbalance inducing voltage imbalance cancels out over charge-discharge cycles, while leakage currents integrate over time, and therefore are really dangerous to the cells, supercap or lithium batteries alike..

The simplest balancing is a bunch of resistors and opamps:

I would never use those special trimmed mosfets, because Vgs will drift with temperature, endangering the mosfet with overcurrent.

[Faranight]

I recently emailed the manufacturer to find out more about the ALP81000XX devices and the current limit, and they had this to say:

ALD810027 does have max. current of 80 mA at about VGS=VDS=~7.8V.  The important thing to know is that the ALD810027 is a voltage operated device, meaning that its own impedance is determined by the voltage across it.

On balancing supercapacitors, the ALD810027 is connected in parallel to each supercapacitor in the string. When a supercapacitor is charging or discharging, that charge/discharge  current does not go through the ALD810027, but goes directly through the supercapacitor itself.
At 2.7V, the ALD810027 only conducts 1 uA whereas there may be many amperes of current going through the supercapacitor.   At Vin = 3.22V the current through the ALD810027 is 1 mA (see TABLE1 of attached datasheet).

Now consider what happens when a supercapacitor goes defective. If it becomes short circuited, then all the currents goes through the defective supercapacitor to the next device. If the supercapacitor becomes open-circuited, then the ALD810027 bears the whole voltage burden across that individual supercapacitor, meaning that it experiences whatever voltage is forced upon it.  If you have 4 supercapacitor in series, then the max. voltage across the defective supercapacitor is  4 x 2.7- 3 x 2.7 = 2.7V
If these other supercapacitors are still at 1.0V or below, then the max. voltage across an ALD810027 is 4 x 2.7 - 3 x 1.0 = 7.8V ,which could cause higher than desired current through the ALD810027 for a brief moment while the other supercapacitors are still charging. That current would then decrease rapidly when the other supercapacitors charges to higher voltages. In any case the supercapacitor chain would fail to function and at that point leakage current balancing is no longer a material factor any more.

[mtwieg]

supercaps have probably 10% imbalance in capacitance, when taken from the same lot

I asked a few manufacturers about this. All of them agreed caps from the same lot would have tighter tolerance, only one actually gave numbers, and that was a standard deviation, not an absolute max/min (sorry, under NDA so can't share more....).

You probably should take more voltage margin anyway, because voltage is a huge influence on supercap lifetime.

Sure, but how much? For example, say a pack has 16 cells in series rated at 3VDC each, and their tolerance is +/-10%. In the worst scenario (nine cells at +10%, one cell at -10%), then the -10% cell would hit 3V when the pack is at around 39.8V, about 83% of the nominal 48V rating. For a more common tolerance of -10/+30%, you'd need to derate to just 34.2V, pretty lousy.

Of course in reality it's very unlikely to assembly such a pack by chance. With proper testing you could even catch the worst packs before shipping them.

capacitance imbalance inducing voltage imbalance cancels out over charge-discharge cycles, while leakage currents integrate over time, and therefore are really dangerous to the cells, supercap or lithium batteries alike..

Do you have some kind of source on this? I genuinely don't know if it's true or not. I've never seen a clear comparison of transient overvoltage stress (due to C imbalance) vs long term overvoltage stress (due to Ilk imbalance).

The simplest balancing is a bunch of resistors and opamps:

Are you proposing this circuit be used to deal with C imbalance? Because if so, that opamp has to be capable of sinking/sourcing the max charging current. And such a circuit doesn't scale very well to higher voltage packs, I assume...

I would never use those special trimmed mosfets, because Vgs will drift with temperature, endangering the mosfet with overcurrent.

The Vgs tempco being negative (as expected for MOS) is, in particular, not good for a balancer. Same tempco but positive would probably be fine.

[Faranight]

Guys, first of all thank you all for the detailed information provided. I think I'm finally starting to understand the principles behind supercapacitor protection. The main issue was that there has been some confusion on my end regarding what the protection circuitry is supposed to do. I was trying to fit too many apples into the same basket. Thus, the point here is that there are *two* things to look out for - balancing and charging.

Balancing:
Balancing is the act of keeping voltages across multiple supercap cells roughly the same. My misunderstanding was not the act, but rather the cause. I believed that balancing should be performed only as a result of supercapacitors having variation in their capacitance. This would supposedly cause voltage imbalances on cells during charging (or discharging). While technically true, there is more to this story. What we are also trying to balance are voltage differences that arise as a result of current leakage of individual cells in the bank. Different cells have different leakage, meaning, that if you were to charge all cells to exactly 2.70V and leave them idle for a while, the voltages on them would begin to slowly decrease and diverge. Supercapacitor balancing is simply the act of preventing (or reducing the impact of) these occurrences. It does not take into account large capacitance mismatches, hence the balancing normally involves very low currents. Thus, the SAB mosfets only address this category, but not the second.

Charging (and discharging):
This is a totally different beast. It involves protection against faults like overvoltage while charging, and undervoltage while the bank is being discharged. Consider 4x100F supercap cells in series - C1, C2, C3 and C4. Now suppose one cell, C2, becomes faulty or somehow defective, and it's capacitance is now only 60F as opposed to 100F. Charging the bank will now cause the voltage on C2 to reach its maximum rated voltage (2.7V) faster than the other cells. If the charger now tries to charge the bank up to 10.8V then excess energy will be forced onto the damaged cell, causing the voltage to rise beyond safe levels. This can quickly lead to bank failure. Likewise, a faulty cell with smaller capacitance will also discharge and reach its minimum allowed voltage faster than the rest. If the bank is discharged further, other cells will now push the current into the faulty cell, lowering the voltage even more and potentially resulting in negative voltage being applied to the cell. The solution is to monitor the voltages of individual cells rather then the bank as a whole and stop the dis/charging once at least one cell reaches its minimum/maximum rated voltage.

[f4eru]

The simplest balancing is a bunch of resistors and opamps:

Are you proposing this circuit be used to deal with C imbalance? Because if so, that opamp has to be capable of sinking/sourcing the max charging current. And such a circuit doesn't scale very well to higher voltage packs, I assume...

Nope. C imbalance does not need to be compensated. It does not drift voltage. leakage imbalance compensation it is for.

The Vgs tempco being negative (as expected for MOS) is, in particular, not good for a balancer. Same tempco but positive would probably be fine.

it's a lousy concept, needing hard to find specialty parts.

Sure, but how much?.... you'd need to derate to just 34.2V, pretty lousy.

In my designs, I keep my supercaps at 1.7 or 2.3V so I can have useful life out of them.
See here, or on manufacturer information (often separate from datasheets):
https://www.analog.com/en/analog-dialogue/raqs/raq-issue-179.html

[mtwieg]

Nope. C imbalance does not need to be compensated. It does not drift voltage. leakage imbalance compensation it is for.

Again, I'm asking for some sort of evidence or analysis backing this up. Why do you think it's ok to exceed the rated cell voltage under transient conditions, but not at steady state conditions?

In my designs, I keep my supercaps at 1.7 or 2.3V so I can have useful life out of them.
See here, or on manufacturer information (often separate from datasheets):
https://www.analog.com/en/analog-dialogue/raqs/raq-issue-179.html

I'm guessing for your application the supercaps are working as a battery backup/replacement, so they are cycled very rarely. In such a case, I would agree that C imbalance is less of a concern since the transient overvoltage will also happen very rarely (but I'm not convinced it should be ignored). And in such an application where the caps are constantly charged, lowering their voltage makes sense for extending lifespan.

For other applications where the caps are cycled frequently (tens or hundreds of times per day), can transient overvoltage while charging be ignored? Until shown convincing evidence otherwise, I'll assume no.

[f4eru]

Why do you think it's ok to exceed the rated cell voltage under transient conditions, but not at steady state conditions?

I never said it 's OK to exceed voltage.
To the contrary, I often heavily under-use voltage, in order to gain a useful lifetime.
When I use a 2.7V rated cap at 2.2V, not only have I a good typical lifetime, but also far enough voltage margin for dynamic imbalance to never cause an over-voltage.

[dongfang_a]

This is my approach: parallel a white light LED with each capacitor. The white light LED has a very steep current-voltage curve around 2.6V. During charging, if the voltage of a capacitor is too high, the LED will be noticeably brighter than the others, thus consuming the extra charging current. Currently, my circuit does not provide cooling for the LEDs, so I am assuming they have a 0.1W dissipation capacity, although these LEDs are actually 1W.

[Siwastaja]

The white light LED has a very steep current-voltage curve around 2.6V.

Not that steep, i.e. they leak quite a bit at lower voltages wasting charge, plus the curve is highly uncontrolled, by unit-to-unit variation and temperature. Maybe it is better than just a resistor, but worse than a zener, and much worse than a TL431-based "ideal zener" circuit which is still cheap and simple.

[mtwieg]

Not that steep, i.e. they leak quite a bit at lower voltages wasting charge, plus the curve is highly uncontrolled, by unit-to-unit variation and temperature. Maybe it is better than just a resistor, but worse than a zener, and much worse than a TL431-based "ideal zener" circuit which is still cheap and simple.

I don't disagree with any of your points, but a TL431 won't dissipate more than ~100mA or 0.5W, so you'd need to add more circuitry to drive a larger dummy load. I can see the appeal of a high power LED if you don't care about a little extra leakage current. Not sure if the negative tempco of the LEDs would be a feature or a bug....

Actually, it looks like TI does make a TL431 in a DPAK. But the datasheet barely mentions this variant... no thermal data given for it. And it might still be limited to 100mA like all the others 

[Siwastaja]

Adding a transistor is not a big deal. It's simple and costs some cents. On the other hand, using inaccurate balancers means you have to leave unused capacity on supercapacitor pack for extra safety margin. That's expensive. And I'm sure no one likes the idea that the expensive capacitors explode when you try to use the thing outdoors or in unheated lab in winter.