Electronics > Power/Renewable Energy/EV's

Interesting- SiC JFETs as the next-gen switching devices

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T3sl4co1l:

--- Quote from: mtwieg on July 03, 2023, 04:00:25 pm ---
--- Quote from: ArdWar on July 01, 2023, 05:04:29 pm ---Was somewhat excited by Nexperia's "No body diode" claim
--- End quote ---
Yeah that's a pretty silly thing to put at the top of a datasheet, even if it is technically true. I hope nobody read that and actually assumed it would block in the third quadrant.

--- End quote ---

Who are you to say it doesn't?

It's an asymmetrical FET, of course you don't get much range in inverted mode. ;)

Tim

tszaboo:

--- Quote from: mtwieg on May 19, 2023, 11:46:22 am ---I've been working with WBG semiconductors for >10 years (mainly GaN, a bit of SiC), and it seems adoption of WBG technology is slow because designers want to have their cake and eat it too. They really want the higher power density, but also want the new device to be a drop-in replacement without any significant changes or risks to the rest of the design or product. I'm assuming I don't have to explain how silly that is.

The most bizarre WBG part I've seen is the GaN FETs from Transphorm which come in TO-247 packages. I'm certain they chose a familiar package so that designers would feel more comfortable substituting it into existing designs. But now you have a super-fast FET trapped in a package with lots of parasitic inductance. Which is likely why Transphorm heavily recommends using RC snubbers and also a ferrite bead on the gate (thus crippling some of its performance gains over Si).

The value of WBG devices depends on how much you're willing to take advantage of them. New packages, new gate drivers, new magnetics, new thermal management etc. When faced with that, a lot of designers lose interest. I'm not saying they're dumb or lazy, it's often the correct choice for their particular product/application.

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It's usually not because of the design hurdle. It's because of vendor lock-in. Once you select devices with unusual vendor specific packages, you are stuck with it. SiC was especially troublesome, as it was coming from small manufacturers and some of them disappears if the wind is blowing the wrong way. And you are stuck with a design, halfway through certification that you cannot build.

mtwieg:

--- Quote from: tszaboo on July 03, 2023, 08:52:07 pm ---It's usually not because of the design hurdle. It's because of vendor lock-in. Once you select devices with unusual vendor specific packages, you are stuck with it. SiC was especially troublesome, as it was coming from small manufacturers and some of them disappears if the wind is blowing the wrong way. And you are stuck with a design, halfway through certification that you cannot build.

--- End quote ---
Certainly the prospect of devices becoming suddenly unavailable is going to discourage a lot of engineers, especially for designs requiring long term support. Same was true when power MOSFETs were starting to replace BJTs.

But of all the differences between MOSFETs and GaN/SiC FETs, packaging is relatively trivial compared to electrical characteristics. Again, much like how MOSFETs were coming in TO-220 packages while most engineers were accustomed to BJTs in TO-3 style packages.

Kevin.D:

--- Quote from: T3sl4co1l on July 03, 2023, 08:33:29 pm ---
--- Quote from: mtwieg on July 03, 2023, 04:00:25 pm ---
--- Quote from: ArdWar on July 01, 2023, 05:04:29 pm ---Was somewhat excited by Nexperia's "No body diode" claim
--- End quote ---
Yeah that's a pretty silly thing to put at the top of a datasheet, even if it is technically true. I hope nobody read that and actually assumed it would block in the third quadrant.

--- End quote ---

Who are you to say it doesn't?

It's an asymmetrical FET, of course you don't get much range in inverted mode. ;)

Tim

--- End quote ---

I obtained a few of these about 4 years ago first assuming  they where somewhat symmetrical ( just noticed manufacturer site chose the symmetrical JFET symbol for their JFETS  (of the two JFET schematic symbols available I always thought the one with gate to the center of channel supposed to signify symmetrical and the other JFET symbol with gate offset to source was for an asymmetrical device). Back then was going try them  in a simple Bidirectional (AC) Eload I had in mind which  obviously have some advantages over unidirectional devices . After having a good look at the data sheet again though I noticed the max Vgs (-25 V) which signifies it must be asymmetrical.
I decide to go ahead and see what useful working range if any could get from them when operated in inverted mode anyway, After a few simple bench test's I found they could be used
upto about -50 Vds, above that reverse leakage through Vgs got to much and latched them on (I had read a white paper on these somewhere on the web  which mentions that that the g-s junction was self healing when subject to over voltage and high leakage current so unlike a BJT e-b junction it shouldn't cause lasting harm the junction) .
Things I noted though operating in inverse mode they had a reduced gm (about half to a third of forward gm but still supposedly useable for my purposes). Interestingly when characterizing I discovered the Vgs(th) actually had a POSITIVE temp coeff when operating in inverse mode ( it had the usual negative temp-coeff in forward mode) . Anyway I was hoping for a bit more than 50 V operational range I got so disappointed , but probably could still be used for a simple lower voltage/lower power AC adjustable load (it saves having to have twice the number of dissipating elements one oriented for each current direction but then they are (or where) twice as expensive as Si MOSFETS), you could use it singularly if less 50 V ac or if higher AC voltages handling required then maybe paired with  another in a cascoded/series setup (where the top SiC JFET is in forward mode dropping most of the Voltage) and  the bottom controlling JFET (oriented in reverse mode dropping up to 50 V so still dissipating some share of the power), then during the negative going current cycle the two JFETS would exchange modes, a bit obfuscated yeah but would work. Veering off topic sorry

mtwieg:

--- Quote from: Kevin.D on July 05, 2023, 12:04:43 pm ---I obtained a few of these about 4 years ago first assuming  they where somewhat symmetrical ( just noticed manufacturer site chose the symmetrical JFET symbol for their JFETS
--- End quote ---
What specific device are you referring to? In my last posts I was referring to GaN FETs, but I'm guessing you're referring to some SiC JFET.

--- Quote ---After having a good look at the data sheet again though I noticed the max Vgs (-25 V) which signifies it must be asymmetrical.
--- End quote ---
Just curious, what about that implies they're assymetric?

--- Quote ---Veering off topic sorry

--- End quote ---
No worries, it's interesting stuff. Just curious why not just use a pair of normal MOSFETs connected in antiseries?

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