Author Topic: Passing radiated EMC with an SMPS involves an element of luck...agreed?  (Read 1796 times)

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Offline JohnG

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #25 on: September 07, 2019, 02:25:44 pm »

Even with US pricing, I’m fairly convinced that emi simulations make sense only for cutting edge research type stuff, and even there it is probably fairly project dependent especially for power electronics

First of all the FEM simulator is just the tip of the iceberg, there are several other problems:
-you also need someone that knows how to use it well (and there are relatively few peoples on the market with such a skill set, and for and engineer to pick it up to proficient level it takes few years)
-a support contract for the software is also almost mandatory(especially for the cheap softwares) the documentation and error messages are purposefully bad (instead of the upfront purchase they make money on the ancillary stuff afterwards)
- material scientists and related equipment for material characterisation as most of the magnetics and dielectrics materials are very very sparsely characterised as only the barest minimum of the material properties are put on data sheets ( either because it is classified as sensitive/IP or more likely because not even the manufacturer has bothered to do it). And this step is of utter importance as a FEM simulator results are only as good as the material definitions are
-the ECAD/Fem simulator interface is usually quite bad and it takes a lot of time to move the geometry from one to the other


Given all of this it is understandable why almost nobody makes use of simulations in this field

Contrast this with ASIC flows where everything is simulated multiple times...
-everyone is trained on simulators as it is really not possible to do otherwise
-the processes and materials are extremely well characterised, foundries provide extensive PDK where all second and third order effects are extremely well studied
-as long as you stay with one vendor it is not that bad to move between tools

Mod up!

This kind of simulation makes sense for very high volume (e.g. phones), very large and costly equipment (e.g. MRI scanners, airplanes), safety-critical applications (e.g. airplanes), and military applications which may have out of the ordinary needs. I believe the OP was talking about such an application.

It also can make sense for small, simplified problems where you cannot measure something because the tools don't exist or they disturb the system you are trying to understand (e.g. power module internal mutual inductance, RF connector to trace impedance, antenna design).

I love simulation, by the way. It can be a huge time-saver and life-saver. I mostly use Spice, and I have done a little 2D and 3D simulation. Enough to know that good FEM engineers are valuable, not that common, and cost as much as good FEM software. By good, I mean ones who can and have solved real-world problems for real hardware that actually worked in the end, and did it in a short enough time to matter.

Cheers,
John

 
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Offline max_torque

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #26 on: September 08, 2019, 12:33:29 pm »
For me, the design on if a model is worth more than a prototype simply comes down to the future use of the model!

For a one off, there is little point in designing, and then validating the model, you may as well spend the time on the real, singular product.

But if you plan to do it all again, then a validated model becomes valuable, because at that point, it can short cut the physical development route.

So, if you're doing a one off SMPS for a product, and you're unlike to do another in the near future, and you're mainly concerned with getting your whole product approved and to production, no, a model based approach is probably a waste of time and resource that could be better spent on real hardware.  But if you're a company that makes SMPS as your product, then yes, developing a validated parametric model for SMPS is really rather valuable, across far more than just EMC testing!
 
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Offline SteveyG

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #27 on: September 09, 2019, 11:47:08 am »
OK no. I haven't encountered any product design (consumer or industrial) where doing EMC with expensive multiphysics modelling software makes financial sense.

Same. Modelling would be an ideal, but in practice it never happens anywhere near to the level being suggested. There would simply be too much of a significant investment in time to get anywhere close to modelling an entire SMPSU design and even then, it would not be particularly accurate.

My experience would be that you create the design with EMC in mind in the first place, model any specifics, but then test and evaluate. Every main supplier power supply company that I know of has their own EMC chamber, but if not, you can usually spend a day in a local EMC test house for only £500 to £1000.
 
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Offline SteveyG

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #28 on: September 09, 2019, 11:48:28 am »
This kind of simulation makes sense for very high volume (e.g. phones), very large and costly equipment (e.g. MRI scanners, airplanes), safety-critical applications (e.g. airplanes), and military applications which may have out of the ordinary needs. I believe the OP was talking about such an application.

I can guarantee you it doesn't happen for MRI scanners. Don't know about aerospace though.
 
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Offline TimNJ

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #29 on: September 11, 2019, 05:37:15 pm »
From my perspective on the consumer/medical SMPS industry, FEM is basically never used. (Never heard of anyone actually using FEM, other than in a random app note from Infineon, etc.) I think the barrier to entry is still way too high to make any sense for a "normal" engineer (like me) to try making use of FEM software.

However, I think it could still be useful from a purely educational perspective, if engineers could visualize how certain layout/construction geometries might affect their design...Maybe not useful to try to model every new project with FEM, but rather using FEM as a tool to understand how fields/waves might interact in that new design. Something to fiddle with, change parameters, and observe..

Is there any reasonable open-source or low-cost modeling software that isn't completely impossible to use? It would be interesting to try out, just to see learn how different electrical and spatial configurations might affect a design...

 
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Offline MagicSmoker

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #30 on: September 11, 2019, 07:02:54 pm »
From my perspective on the consumer/medical SMPS industry, FEM is basically never used. (Never heard of anyone actually using FEM, other than in a random app note from Infineon, etc.) I think the barrier to entry is still way too high to make any sense for a "normal" engineer (like me) to try making use of FEM software.
...

Yep, and this has been my perspective from the industrial / heavy transportation side of things. Coincidentally, I'm doing a job right now for a company that is staffed almost entirely with PhDs who just love to model stuff and were asking if they should invest in FEM software. Rather than flat out tell them no, I instead asked how closely their current design resembles their SPICE model? I got nothing but crickets in response...  :-DD

 
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Offline T3sl4co1l

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #31 on: September 11, 2019, 09:10:22 pm »
Yep, and this has been my perspective from the industrial / heavy transportation side of things. Coincidentally, I'm doing a job right now for a company that is staffed almost entirely with PhDs who just love to model stuff and were asking if they should invest in FEM software. Rather than flat out tell them no, I instead asked how closely their current design resembles their SPICE model? I got nothing but crickets in response...  :-DD

Well, such a scenario implies ignorance on someone's part.

A SPICE model is rarely a full design, and need not resemble the part it's modeling, for a given definition of semblance and degree of model accuracy.  It's simply the wrong question to ask.

Conversely: a useful model needs to reflect the characteristics, dynamics, whatever of the problem at hand, and of the space around the problem.  Models might also be used as much to disprove alternatives, as to prove a preferred embodiment, in which case the resemblance is supposed to be slight!

So there may be two reasons why you got blank stares. ;)

Tim
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Offline MagicSmoker

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #32 on: September 12, 2019, 04:57:46 pm »
Yep, and this has been my perspective from the industrial / heavy transportation side of things. Coincidentally, I'm doing a job right now for a company that is staffed almost entirely with PhDs who just love to model stuff and were asking if they should invest in FEM software. Rather than flat out tell them no, I instead asked how closely their current design resembles their SPICE model? I got nothing but crickets in response...  :-DD

Well, such a scenario implies ignorance on someone's part.

That's a bit harsh, and perhaps a bit disconnected from reality, too. In an ideal world all FE and SPICE software would be easy to learn, highly accurate, and execute simulations in reasonable times without requiring state-of-the-art desktop PCs to run it. In the real world, FE and (to a lesser extent) SPICE software is exceptionally difficult to use, buggy or quirky, has little to no ability to warn you when you are performing a GIGO simulation (that is, Garbage In, Garbage Out), relies on algorithmic shortcuts that may compromise accuracy in the name of expediency, and is so demanding of CPU cycles and memory bandwidth that it cripples the computer it is being run on for minutes (SPICE) to hours (FE) at a time.

A great example is modeling a transformer in LTSpice. At the simplest/least-accurate level you need only specify a coupling coefficient, K, for two or more inductors, and if K=1 then LTSpice will execute a simulation extremely quickly. At the next level of accuracy you can approximate leakage by setting K<1; this dramatically increases the computational effort but starts to show real world behavior like ringing and spikes during switch turn-off, limited short-circuit current and voltage transformation errors, etc. You can then specify the parallel capacitance across each "inductor" which improves the accuracy of losses and common mode noise coupling, at yet another dramatic increase in simulation time. Finally, you can switch to the non-linear Chan model to incorporate the behavior of the core at, once again, a hefty penalty in simulation time. In the end a simulation that took a few 10s of milliseconds to run now takes 10s of minutes, and it still won't generate waveforms that look exactly like what the actual prototype delivers, so there goes your EMC analysis.


So there may be two reasons why you got blank stares. ;)

The implication was that the performance of the actual device (a resonant mode transformer) was quite a bit different from the model they created in the pricey SPICE software they use (NB - I recreated the model in LTSpice and it came much closer); contemplating just how much more different an FE model of a complete product might behave compared to the actual product proved sobering, hence the lack of a comment in response to my rhetorical question.

And these people aren't stupid, or even ignorant. The overall circuit is a real work of art, it's just they pushed everything harder than they should have, had to radically change the overall circuit midway through once a regulatory issue was clarified, and haven't much (any) experience with designing a commercial product (rather than a prototype for an IEEE paper), much less for manufacturability.

 
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Offline T3sl4co1l

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #33 on: September 12, 2019, 05:26:05 pm »
A great example is modeling a transformer in LTSpice. At the simplest/least-accurate level you need only specify a coupling coefficient, K, for two or more inductors, and if K=1 then LTSpice will execute a simulation extremely quickly. At the next level of accuracy you can approximate leakage by setting K<1; this dramatically increases the computational effort but starts to show real world behavior like ringing and spikes during switch turn-off, limited short-circuit current and voltage transformation errors, etc. You can then specify the parallel capacitance across each "inductor" which improves the accuracy of losses and common mode noise coupling, at yet another dramatic increase in simulation time. Finally, you can switch to the non-linear Chan model to incorporate the behavior of the core at, once again, a hefty penalty in simulation time. In the end a simulation that took a few 10s of milliseconds to run now takes 10s of minutes, and it still won't generate waveforms that look exactly like what the actual prototype delivers, so there goes your EMC analysis.

If you're getting orders-of-magnitude increases in simulation time, something is very wrong!  Those options are increasing the element count by one, three and about a dozen, respectively.

To get waveforms "exactly like ... the prototype" you'd likely have to run FEA on the layout itself; you're also depending on the manufacturer device models, which vary from stock SPICE (e.g. a LEVEL=3 MOSFET with nonlinear capacitors and parasitics added on) to full-on custom (2-3 pages solid of nonlinear dependent sources and their functions).  The former runs fast and converges well but misses subtle physics of the real device; the latter runs terribly slow on board-level simulators, and may suffer from convergence issues, especially in buggy simulators (possibly the enterprise-level ones do better, or at least take better advantage of more powerful hardware).

It can be worthwhile to avoid the latter type of model, just for being able to run enough simulations, and tweaking the models or results accordingly.


Quote
The implication was that the performance of the actual device (a resonant mode transformer) was quite a bit different from the model they created in the pricey SPICE software they use (NB - I recreated the model in LTSpice and it came much closer); contemplating just how much more different an FE model of a complete product might behave compared to the actual product proved sobering, hence the lack of a comment in response to my rhetorical question.

Taking the statement at face value, it's believable, but has the issues I identified.  Now that you've identified the particular case, I can see it is indeed on the realistic side. :)


Quote
And these people aren't stupid, or even ignorant. The overall circuit is a real work of art, it's just they pushed everything harder than they should have, had to radically change the overall circuit midway through once a regulatory issue was clarified, and haven't much (any) experience with designing a commercial product (rather than a prototype for an IEEE paper), much less for manufacturability.

Yep, that's a problem for anyone new to a given field or sub-field: you simply don't have experience in the particulars.  Doesn't matter how smart or educated you are; if you don't have that exact experience, you simply don't.  Ignorance isn't a bad thing, it's just a thing.  You can't fix stupid, as they say, but ignorance is easily treated through research and practice. :)

A good approach would be to do an introductory project or two, to feel out the new space  Then to dive into the big project, being able to optimize everything much more evenly, not just the core-domain parts.  Sometimes that may not be possible due to tight schedules; then again, it could well be a time saver yet, even if not to the immediate deadline, but to avoid inevitable production delays later on.

Tim
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Offline MagicSmoker

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #34 on: September 12, 2019, 10:04:52 pm »
If you're getting orders-of-magnitude increases in simulation time, something is very wrong!  Those options are increasing the element count by one, three and about a dozen, respectively.

Not at all - making k<1 or specifying meaningful parallel capacitance results in high frequency ringing which drastically increases the amount of data generated and (should) force the simulator to reduce the time step size. That said, I did fail to mention that one has to actually tell LTSpice to limit the size of the time step when incorporating real strays otherwise it might just skip right over the oscillations caused by them completely.

To get waveforms "exactly like ... the prototype" you'd likely have to run FEA on the layout itself

Yep, but that's what most of here are arguing isn't worth the effort!? I was just using SPICE simulation of the circuit to extrapolate the immense increase in difficulty required to do an FE analysis of the entire assembly for EMC (that is the subject of this thread, after all...  :P )

...you're also depending on the manufacturer device models, which vary from stock SPICE (e.g. a LEVEL=3 MOSFET with nonlinear capacitors and parasitics added on) to full-on custom (2-3 pages solid of nonlinear dependent sources and their functions).  The former runs fast and converges well but misses subtle physics of the real device; the latter runs terribly slow on board-level simulators, and may suffer from convergence issues, especially in buggy simulators (possibly the enterprise-level ones do better, or at least take better advantage of more powerful hardware).

Yep, we're on the same page here. Experience, knowledge and good judgement (oh, and time) inform when to do the quick-n-dirty sim vs. when to use the full blown subckt/inline models for every component, etc. The thing is, for circuit simulation you can often do the quick-n-dirty for most of the development process and only switch to using the device-specific models when fine-tuning things, but for EMC simulation you need to specify Every Fucking Thing or doing it is pointless.

Taking the statement at face value, it's believable, but has the issues I identified.  Now that you've identified the particular case, I can see it is indeed on the realistic side. :)

Sorry for being circumspect but NDAs and all that. I can't even mention the specific topology without giving away what the thing is since the author of the IEEE paper on it is the lead engineer at the company. 

At any rate, yes, the problem is, indeed, incomplete knowledge of all the salient - if not the passingly relevant - details involved. But like I said above, that's not necessarily fatal when doing a SPICE simulation of a circuit, but invariably fatal when doing an FE analysis for EMC.

Yep, that's a problem for anyone new to a given field or sub-field: you simply don't have experience in the particulars.  Doesn't matter how smart or educated you are; if you don't have that exact experience, you simply don't.  Ignorance isn't a bad thing, it's just a thing.  You can't fix stupid, as they say, but ignorance is easily treated through research and practice. :)

Right... you meant literal ignorance - a simple lack of knowledge - rather than the altogether more pejorative meaning commonly ascribed to it today. We're in total agreement there, then. I still maintain that FEA (or FEM - whether you prefer the last letter stand for Analysis or Modeling) is economically unattractive most of the time. I mean, have you actually used (or tried to use) SABER or ANSYS (for two examples I've had the displeasure of being tortured with before)? Those programs just have the most brutal learning curve of anything I have ever seen.

A good approach would be to do an introductory project or two, to feel out the new space  Then to dive into the big project, being able to optimize everything much more evenly, not just the core-domain parts.  Sometimes that may not be possible due to tight schedules; then again, it could well be a time saver yet, even if not to the immediate deadline, but to avoid inevitable production delays later on.

Mmm... yep, I agree this is the best way to get up to speed with such FEA monstrosities, but in this case it is 2.5 years past the original estimate of taking 6 months to complete... But baptism-by-fire is the usual way things get done in small companies. :scared:

 
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Offline T3sl4co1l

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #35 on: September 12, 2019, 10:44:01 pm »
Not at all - making k<1 or specifying meaningful parallel capacitance results in high frequency ringing which drastically increases the amount of data generated and (should) force the simulator to reduce the time step size. That said, I did fail to mention that one has to actually tell LTSpice to limit the size of the time step when incorporating real strays otherwise it might just skip right over the oscillations caused by them completely.

Oh, relative to a really big timestep where you don't get any of those details, sure.

But that's trivially solved with a piecewise energy balance argument -- http://schmidt-walter-schaltnetzteile.de/smps_e/smps_e.html for example.  If you're plugging everything into SPICE just to see what the gross waveforms are, you're using the wrong tool!

This goes hand-in-hand with a number of other bad habits, implementing discontinuous functions for example, perhaps the worst of which is the IF() function.  SPICE simply isn't made to solve such problems -- it requires real, finite derivatives of the provided functions -- so it quickly crumples under such a burden.

Indeed, such a simple premise, you might as well run in Falstad circuit simulator -- its constant-timestep, first order integration doesn't much care how well-behaved the derivative is.  But it's easily fooled (a small difference leading to exponential instability), so is of limited use.

Some simulators handle this well; Simetrix I think is one?  PSPICE apparently deals with it pretty well too, which unfortunately leads to zillions of mfg models being written for it, with TABLE functions.  Gack.


Quote
Mmm... yep, I agree this is the best way to get up to speed with such FEA monstrosities, but in this case it is 2.5 years past the original estimate of taking 6 months to complete... But baptism-by-fire is the usual way things get done in small companies. :scared:

Heh yep, all too common unfortunately...

Cheers!

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #36 on: September 13, 2019, 01:47:15 am »
The other elephant in the room is that in a real design most chips simply don't have detailed enough models for EMC simulations to tell you anything meaningful. I was working on a board that required high isolation between sections up to 3GHz where it was experimentally determined that a PLL synthesizer chip had significant leakage of RF into the SPI control pins. The best models you can get for these kinds of parts are equivalent circuits for each pin individually and there is no way you can predict something like this. Since every leakage path matters you will get wrong results and be sad when the prototype performs like shit and nothing like the simulation.

In practice the only time where board level EM simulations would have been useful for me is for signal integrity (e.g. DDR3/4). In that case you would only be simulating small parts of the board (just the DDR traces and the driver models). It is very rare that you would want or even be able to simulate an entire board.

LTSpice and RFSim99 do pretty much everything I need in terms of simulation. I'm also looking into OpenEMS for antenna and signal integrity analysis. I won't be considering expensive EM software that do not and will not do what they claim to be able to do (with reasonable effort and computing power).
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Online AndyC_772

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #37 on: September 13, 2019, 09:39:20 am »
Thanks, on a related topic, all the places where I have worked where they have designed offline flybacks in plastic cases, did not pass radiated EMC to EN55032 class B unless cable ferrites were used in the supply cable. As you know, unfortunately,  having a supply cable with a cable ferrite on it is a lot more expensive than just a supply cable.

These companies  still sold the product because it passed conducted EMC, and they declared that they were “working on” a pass for the radiated EMC.

In fact, I think many would agree, that it is  not possible to pass radiated emissions to “EN55032 class B “ with a hard-switched SMPS unless one encloses the SMPS in a metal enclosure, or encloses at least the switching node in a “metal can”, or  uses a cable ferrite in the supply cable.

A few years ago I carried out EMC testing on a product I'd designed for a customer. It needed to plug into a PC as support equipment, so I took my laptop.

Fully expecting the worst, I plugged in the mains power brick, which was a 180W unit manufactured by FSP.

That supply turned out to be exceptionally quiet, really impressively so.

Since then I opened one up to take a look inside. The outer enclosure is sealed plastic, but inside there's a metallic layer which covers four sides (though not the ends, oddly). On the DC outlet side there's a ferrite bead moulded onto the cable, but on the mains side it's just an IEC socket with no external ferrite needed.

Given the exceptional EMC performance, I can't call that a "bad" design. Far from it.

FWIW the oddest place I think I've seen cable ferrites used is on the (wired) controllers for the Sony PlayStation. Still can't quite figure out how that was cheaper than fixing any EMC problems with internal filters instead.
 
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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #38 on: September 13, 2019, 10:40:06 am »
The other elephant in the room is that in a real design most chips simply don't have detailed enough models for EMC simulations to tell you anything meaningful. I was working on a board that required high isolation between sections up to 3GHz where it was experimentally determined that a PLL synthesizer chip had significant leakage of RF into the SPI control pins. The best models you can get for these kinds of parts are equivalent circuits for each pin individually and there is no way you can predict something like this. Since every leakage path matters you will get wrong results and be sad when the prototype performs like shit and nothing like the simulation.

In practice the only time where board level EM simulations would have been useful for me is for signal integrity (e.g. DDR3/4). In that case you would only be simulating small parts of the board (just the DDR traces and the driver models). It is very rare that you would want or even be able to simulate an entire board.

LTSpice and RFSim99 do pretty much everything I need in terms of simulation. I'm also looking into OpenEMS for antenna and signal integrity analysis. I won't be considering expensive EM software that do not and will not do what they claim to be able to do (with reasonable effort and computing power).

I fully agree with this.. With increasing complex SOCs coming in the market with multiple RF cores and High Speed digital switching, it is almost impossible to get a model for the IC. So performing EM model to find out on the die or on the package coupling is exceedingly complex. We only go by best practices and tricks learnt over many years to keep out unwanted coupling.

Modelling the entire system including the ICs, passives and other components with the PCB and mechanicals would be exceedingly complex job. Even with the perfect models made, running a simulation for  a far field pattern on the system is the next difficult task. The amount of memory and computation needs for solving the maxwells equations for this, would be enormous.

On my previous job, I had made some effort on this front by simplifying the geometries to reduce the meshing size. Then many components which may not carry high frequency currents were eliminated to simplify this further. With all these done, the design simulation on HFSS would take multiple hours, if not days. This is good enough to get a first level of understanding of the problem. But most solutions were arrived at by intuition and experience only.
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Offline JohnG

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Re: Passing radiated EMC with an SMPS involves an element of luck...agreed?
« Reply #39 on: September 18, 2019, 02:58:37 pm »
This kind of simulation makes sense for very high volume (e.g. phones), very large and costly equipment (e.g. MRI scanners, airplanes), safety-critical applications (e.g. airplanes), and military applications which may have out of the ordinary needs. I believe the OP was talking about such an application.

I can guarantee you it doesn't happen for MRI scanners. Don't know about aerospace though.

For SMPS power supply, it would be unusual to do this for MRI to pass EMI regulations, but EMI susceptibility is a big concern. I know for a fact that it has been done for research on power electronics and effects on image quality. MRI development for sure makes extensive use of 3D FEM for electromagnetic and mechanical design.
 
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