Power supply EMC document is erroneous?

[Faringdon]

Hi,
The following article makes statements about EMC.
https://www.ti.com/lit/an/snva489c/snva489c.pdf?ts=1713454091161

On page 2 it says
 QUOTE>>>In a typical IC based non-isolated DC-DC SMPS, only two lines connect to the input port. So any current
 going in through one terminal has to go out through the other. In this configuration, the common mode
 noise VCOMM will always be zero.<<<<UNQUOTE

..Surely it cant be zero?....
Though we see "two lead" offline SMPS's, and they have common mode chokes, and Y caps across the transformer isolation barrier,
So they do have Common mode noise...so surely a non-isolated DCDC also does?, and can radiate to its surroundings...and when it
does so, its "go" and "return" currents will not be equal and so we have common mode noise?

..On page 3 it says the following....

QUOTE>>>Conducted EMI involves the normal operation of DC-DC converters. It does not involve circuit parasitics
 except input or output capacitor ESR and ESL. PCB layout itself is not going to help reduce conducted
 EMI. Further, conducted EMI is only related to the current level, not the voltage level at input or output
 ports. In another words, with the same power level buck converter, lower input voltage means higher input
 current, thus worse input conducted EMI.<<<<UNQUOTE

...surely these 3 sentences are filled with innaccurate statements? For starters, conducted EMI involves more strays than just capacitor related
ones, also  PCB  layout can surely help reduce conducted emissions? High voltage , low current SMPS's can have just as much conducted EMC problem
as Low voltage, high current ones, for example the dv/dt of the switching node can cause severe conducted emissions problems.

[AnalogTodd]

Read and pay attention to the article. It is talking in those places about CONDUCTED EMI, not radiated.

..Surely it cant be zero?....
Though we see "two lead" offline SMPS's, and they have common mode chokes, and Y caps across the transformer isolation barrier,
So they do have Common mode noise...so surely a non-isolated DCDC also does?, and can radiate to its surroundings...and when it
does so, its "go" and "return" currents will not be equal and so we have common mode noise?

You are ignoring KCL for a non-isolated DC-DC SMPS. It doesn't matter what the load looks like, it doesn't matter what the SMPS looks like, if you have one wire in and one wire out, the currents MUST always be equal. You don't get electrons magically flying off into the ether unless you are actually getting to where you are turning things into a plasma, and even then they must be returning through another path.

...surely these 3 sentences are filled with innaccurate statements? For starters, conducted EMI involves more strays than just capacitor related
ones, also  PCB  layout can surely help reduce conducted emissions? High voltage , low current SMPS's can have just as much conducted EMC problem
as Low voltage, high current ones, for example the dv/dt of the switching node can cause severe conducted emissions problems.

You are mixing up conducted and radiated EMI. Conducted EMI is passed through the circuit in question and is not part of the magnetic fields that create radiated EMI coming from large loops on the board or fields created by switching currents. Remember, at zero current it is impossible to have conducted EMI, there has to be electrons flowing to get conducted EMI.

Please, review your physics.

A simple way to look at this is to think about a linear regulator on a board; conducted EMI is often viewed as the power supply rejection (PSRR) of the part. Conducted EMI should solely be a function of the circuit response and with perfect models will match between simulations and reality. I have personally seen that to hold true in the design of very high PSRR parts. But what was also found to be true is that the PSRR on early boards didn't match what simulations said it should. It was found that having a capacitor right at the input of the part killed the PSRR. This was because at frequency the capacitor was a low impedance and ran significant current. This raised the AC voltage at the input of the part (parasitic R and L of the traces coupled with the cap) and also created a magnetic field that coupled into other sections of the board. We are not talking about a 6dB difference in PSRR, but instead 40dB. It became very important to separate conducted versus radiated EMI and know which was which and how to correct each one.

[tggzzz]

For starters, conducted EMI involves more strays than just capacitor related
ones, also  PCB  layout can surely help reduce conducted emissions? High voltage , low current SMPS's can have just as much conducted EMC problem
as Low voltage, high current ones, for example the dv/dt of the switching node can cause severe conducted emissions problems.

The answer to that will be a vital part of your company's IPR, so get the answer straight for when you sell it "for a very large sum" to the "Chinese consortium":
https://www.eevblog.com/forum/renewable-energy/intelligent-product-of-switch-mode-power-supplies/msg5456486/#msg5456486

[Faringdon]

You are ignoring KCL for a non-isolated DC-DC SMPS. It doesn't matter what the load looks like, it doesn't matter what the SMPS looks like, if you have one wire in and one wire out, the currents MUST always be equal. You don't get electrons magically flying off into the ether unless you are actually getting to where you are turning things into a plasma, and even then they must be returning through another path.

Thanks, so why do 2-lead input offline SMPS have common mode chokes and Y caps?

You are mixing up conducted and radiated EMI. Conducted EMI is passed through the circuit in question and is not part of the magnetic fields that create radiated EMI coming from large loops on the board or fields created by switching currents.

Thanks, i tend to agree, though as is known, a power supply board that is going to fail radiated EMC, is highly likely to have a high level of common mode emissions as detected on the conducted EMC scan.
In fact, a power supply PCB that gives out  radiated EMI, is bound to show common mode conducted emissions.
And as page 17 of the following states, an EMC problem above 1MHz is likely due to common mode conducted emissions...
https://emcfastpass.com/wp-content/uploads/2017/04/an15.pdf

A simple way to look at this is to think about a linear regulator on a board; conducted EMI is often viewed as the power supply rejection (PSRR) of the part. Conducted EMI should solely be a function of the circuit response and with perfect models will match between simulations and reality. I have personally seen that to hold true in the design of very high PSRR parts. But what was also found to be true is that the PSRR on early boards didn't match what simulations said it should. It was found that having a capacitor right at the input of the part killed the PSRR. This was because at frequency the capacitor was a low impedance and ran significant current. This raised the AC voltage at the input of the part (parasitic R and L of the traces coupled with the cap) and also created a magnetic field that coupled into other sections of the board. We are not talking about a 6dB difference in PSRR, but instead 40dB. It became very important to separate conducted versus radiated EMI and know which was which and how to correct each one.

Thanks for this, it sounds interesting, although you seem to be saying that you had a linear regulator and its performance became worse when a higher capacitance  decoupling capacitor was fitted at its input terminals(?)......i must admit, i am used to adding such a capacitor to solve  a problem. I wasnt aware of any need to limit the capacitance at the "input" to a linear regulator. When you look at Middlebrooks theorems, there is nothing in there that says limiting the capacitance at input to a power supply (or linear reg)  solves problems.....more the other way round.
I am guessing that theres more to this than you are going into?...and that perhaps the load of the linear reg was a pulsating load or something(?)

you don't get electrons magically flying off into the ether

Thanks,  yes they dont magically do that i agree....but i am sure you would agree, any DCDC , even two lead input ones, supplied even by a battery,  can cause radiated EMC problems.
A "2 lead input" DCDC which causes radiated EMC problems (eg the authorities detect it and say no to it), is highly likely to have a conducted common mode EMC problem.

As we all know, KCL and all that , is part of the well known "low frequency approximation" that we all use to develop things because its easy and quick to do so....but as you know, KCL is not in fact accurate at all in real terms...it has its "older  cousin" form by way of Maxwell's equations...and these describe and condone why a 2 lead DCDC can cause radiated EMC problems, and can have a common mode conducted EMC problem.

Remember, at zero current it is impossible to have conducted EMI, there has to be electrons flowing to get conducted EMI.

Thanks yes, i would agree, and i am sure you would agree that its di/dt that causes the EMC problem. A totally "flat" DC current would not cause an EMC issue.
The article "Common mode EMI noise suppression for bridgeless PFC converters" on page 292 gives the causation of
common mode noise. (this IEEE article is  now hard to find on www)

QUOTE>>>As we all know, CM noise is due to the voltage pulsating
generated by high-frequency switching. Such high dv/dt generates
CM noise currents which go through the parasitic capacitance
from converter to ground.<<<QUOTE

So yes, its di/dt, but interwoven with the current is the changing voltage aswell

As is known, DCDC's in cars and trains and aeroplanes all can produce radiated emissions....and that any  DCDC power supply PCB that produces radiated emissions, will inevitably present common mode conducted emissions. The article of the top post, says that common mode conducted emissions from a 2_lead_input DCDC would be zero...this is not the case.

As can be seen on page 36 of the following....common mode noise currents can indeed be created in a 2_lead_input DCDC,
This page (36) also shows how they can be caused by the drain of the switching mosfet......
https://www.vicorpower.com/documents/design_guides/DG-DCM-Design-Guide-VICOR.pdf
________________________________________________________ ______________________________________________________________
As is known, with a 2_lead_input DCDC, the module is often housed in a metal enclosure/heatsink.
The metal of the enclosure is often not permitted to be connected to any of the circuit conductors.
In such cases, the metal enclosure is still declared as the "EMI ground" or "chassis ground".
And as such, the circuit power inputs and outputs are often connected to the metal enclosure via Y capacitors.
This is to reduce common mode noise of the 2_lead_input DCDC.

So, the actual chassis GND  , as discussed, is often not directly (DC) connected to the circuit conductors,
but often is made to be a copper plane in a certain layer of the DCDC's PCB. This "chassis plane"
, in part, serves to capacitively couple to the circuit conductors so as to re-route disturbances
that would otherwise  manifest as common mode noise. Ie capacitively re-route noise back to the
circuit so that it doesnt go off as common mode noise.

[ejeffrey]

As we all know, KCL and all that , is part of the well known "low frequency approximation" that we all use to develop things because its easy and quick to do so....but as you know, KCL is not in fact accurate at all in real terms...it has its "older  cousin" form by way of Maxwell's equations...and these describe and condone why a 2 lead DCDC can cause radiated EMC problems, and can have a common mode conducted EMC problem.

The difference between KCL and ampere's law / Maxwell's equations is pretty much the definition of "radiative emissions".  Specifically, KCL + displacement current is amperes law.  If you have only two wires and they have a mismatched current, it must be matched by displacement current. Displacement current can be from capacitive coupling to ground, but if we are testing an isolated device on a non conductive table, capacitance is negligible.  The only other option is radiation.

Two wire power supplies have chokes and filters to avoid turning into radiators and also because they tend to get plugged into devices, not used floating in space.  So to some extent the distinction is a bit artificial indeed. 

[Faringdon]

Two wire power supplies have chokes and filters to avoid turning into radiators and also because they tend to get plugged into devices, not used floating in space.  So to some extent the distinction is a bit artificial indeed.

Thanks, yes, once remember having a 150W DCDC Switch Mode LED driver....a 2_lead_input SMPS....was three parallel interleaved Bucks.....whenever you plugged it into the 48V output of a meanwell offline PSU, the Lab Radio would go from full volume music, to total silence....soon as you unplugged it, the Lab Radio would come back on. The Lab Radio was plugged in to the same mains circuit, a few metres away. This problem was solved by increasing the FET drive series gate resistors from 2R7 to 4R7.
That 2_LEAD_input SMPS would have shown a significant common mode problem on its conducted EMC scan.
So why in the top post, they are saying 2_lead_input SMPS's dont have  common mode emissions, i don't know.
_______________________________________ _________________________________________________----
I wont forget once being a "slave mentor" to a junior engineer whose father had payed
richly for him to come to the company and do his "first job work experience".
He was bone idle....used to sit on the lab bench so no-one else could work on it,
then just go on his phone till he felt like doing a bit of work. Or he would sit there
making "solder pools" on the ESD mat...stirring the solder round and round.
All this right under the Lab cam, and within the direct  sight of the production manager, who used to look
at me with a furrowed brow with it happening.
(the work by the way, was all for the UK military, whether that was behind the reluctance of this guy to work on it
i dont know. The company had been given a UK military grant to do the work, the grant coming based on the company's
turnover being so high...thing is, that turnover was from the "behind the scenes Chinese SMPS import operation")

One day  we were sent these "2_lead_input" DCDC's, which didnt work.
(48Vin, 24Vout, 200W, PushPull). The layout was terrible.
The lazy guy wouldnt allow work on them, and so we were slow,  so we both got asked to do unpayed overtime.
As soon as 1700hrs came, i noticed this guy "accidentally" soldered the PCB such that the circuit ground
was connected to the chassis ground, (via the restring of the PCB chassis screw hole).
Of course, the PCBs then suddenly started working, as he knew they would,  and he got to go home.
Muggins here then stayed late to properly sort the problem out. But it does show how if you have any DCDC
in a metal heatsink/enclosure, you must ensure that circuit ground of the PCB is connected to the metal
enclosure via Y caps.
Obviously its not good to directly DC connect circuit ground and the enclosure (though in some cases its
acceptable).
...This of course, shows a common mode conducted EMC problem....so again why they say "common mode = zero for 2 lead input SMPS"
is a mystery.
___---____----__________________________
On page 21 of the following, is a 2_lead_input SMPS with common mode choke at the input, for combatting
the common mode noise. It also has shields over it.....they are not for diff mode filtration as you know.

https://www.ti.com/lit/ug/snvu623b/snvu623b.pdf?ts=1713707381983&ref_url=https%253A%252F%252Fwww.ti.com%252Flit%252Fds%252Fsymlink%252Flm5143.pdf%253Fts%253D1713697779917%2526ref_url%253Dhttps%25253A%25252F%25252Fwww.ti.com%25252Fproduct%25252FLM5143

[mtwieg]

They're assuming the SMPS has literally only two connections to the rest of the world, including no stray inductive or capacitive coupling. Under those assumptions, common mode current cannot exist, as it has no defined return path, so there will only be differential mode emissions.

If you connect a SMPS (AC or DC input doesn't matter) to a load which has its own return path to earth, then this assumption doesn't hold, which is the main reason you will still see common mode filters on class II power supplies with no earth connection of their own.

[Faringdon]

They're assuming the SMPS has literally only two connections to the rest of the world, including no stray inductive or capacitive coupling. Under those assumptions, common mode current cannot exist, as it has no defined return path, so there will only be differential mode emissions.

Thanks, i take it they must have made that assumption. Though as you know, the real world will not allow this. I wonder if there are any  EMC regulatory tests where they only look into differential mode emissions? I haven't ever heard of any?
All regulatory EMC scans always include both common mode and diff mode emissions.
Getting an EMC scan to produce "only " the common mode emissions, or "only" the diff mode emissions, is extremely expensive, and virtually unheard of.
As we know, its not helpful to say "common mode = zero", because  then someone fails EMC but only does diff mode filtering to solve it, when they should be adding in common mode filtering aswell...because
common mode emissions in the real world (for 2 lead input SMPS) are definitely not with "common mode = zero."

As you know, any SMPS whatsoever, can produce radiated emissions, and it goes without saying , that any SMPS which produces radiated emissions, will also present  common mode conducted emissions.

[AnalogTodd]

You are ignoring KCL for a non-isolated DC-DC SMPS. It doesn't matter what the load looks like, it doesn't matter what the SMPS looks like, if you have one wire in and one wire out, the currents MUST always be equal. You don't get electrons magically flying off into the ether unless you are actually getting to where you are turning things into a plasma, and even then they must be returning through another path.

Thanks, so why do 2-lead input offline SMPS have common mode chokes and Y caps?

Because we don't have perfect conductors or supplies with zero output impedance across frequency, nor do we have environments where you can get ultra-high voltages without risk of arcing over.

You are mixing up conducted and radiated EMI. Conducted EMI is passed through the circuit in question and is not part of the magnetic fields that create radiated EMI coming from large loops on the board or fields created by switching currents.

Thanks, i tend to agree, though as is known, a power supply board that is going to fail radiated EMC, is highly likely to have a high level of common mode emissions as detected on the conducted EMC scan.
In fact, a power supply PCB that gives out  radiated EMI, is bound to show common mode conducted emissions.
And as page 17 of the following states, an EMC problem above 1MHz is likely due to common mode conducted emissions...
https://emcfastpass.com/wp-content/uploads/2017/04/an15.pdf

I think I know the engineer who wrote that app note. The reason that you get conducted emissions at the higher frequencies is because for a power supply circuit, loops are typically running at a lower crossover frequency and components used will change characteristics as you get to those high frequencies. Get into the RF realm and you find that the world REALLY gets weird. There is no "ground plane", everything couples to everything else, it really starts to look like black magic.

A simple way to look at this is to think about a linear regulator on a board; conducted EMI is often viewed as the power supply rejection (PSRR) of the part. Conducted EMI should solely be a function of the circuit response and with perfect models will match between simulations and reality. I have personally seen that to hold true in the design of very high PSRR parts. But what was also found to be true is that the PSRR on early boards didn't match what simulations said it should. It was found that having a capacitor right at the input of the part killed the PSRR. This was because at frequency the capacitor was a low impedance and ran significant current. This raised the AC voltage at the input of the part (parasitic R and L of the traces coupled with the cap) and also created a magnetic field that coupled into other sections of the board. We are not talking about a 6dB difference in PSRR, but instead 40dB. It became very important to separate conducted versus radiated EMI and know which was which and how to correct each one.

Thanks for this, it sounds interesting, although you seem to be saying that you had a linear regulator and its performance became worse when a higher capacitance  decoupling capacitor was fitted at its input terminals(?)......i must admit, i am used to adding such a capacitor to solve  a problem. I wasnt aware of any need to limit the capacitance at the "input" to a linear regulator. When you look at Middlebrooks theorems, there is nothing in there that says limiting the capacitance at input to a power supply (or linear reg)  solves problems.....more the other way round.
I am guessing that theres more to this than you are going into?...and that perhaps the load of the linear reg was a pulsating load or something(?)

I am saying that we were getting a loop at the input of the regulator interacting with a loop at the output of the regulator through magnetic fields. The regulator had a resistive load, we were checking supply rejection across frequency, so we were running an AC voltage to the input of the regulator.

It's on pp. 16-18 of this app note https://www.analog.com/media/en/technical-documentation/app-notes/an-159.pdf.

you don't get electrons magically flying off into the ether

Thanks,  yes they dont magically do that i agree....but i am sure you would agree, any DCDC , even two lead input ones, supplied even by a battery,  can cause radiated EMC problems.
A "2 lead input" DCDC which causes radiated EMC problems (eg the authorities detect it and say no to it), is highly likely to have a conducted common mode EMC problem.

As we all know, KCL and all that , is part of the well known "low frequency approximation" that we all use to develop things because its easy and quick to do so....but as you know, KCL is not in fact accurate at all in real terms...it has its "older  cousin" form by way of Maxwell's equations...and these describe and condone why a 2 lead DCDC can cause radiated EMC problems, and can have a common mode conducted EMC problem.

I never said that you can't have a two lead supply have radiated EMC problems. With the flow of electrons you can get magnetic fields that sap energy from a circuit (that's how transformers work) as they induce electrons to move in other circuits. If you have one lead in and one lead out with nothing you are coupling to, the differential current in the two leads should be zero.

Remember, at zero current it is impossible to have conducted EMI, there has to be electrons flowing to get conducted EMI.

Thanks yes, i would agree, and i am sure you would agree that its di/dt that causes the EMC problem. A totally "flat" DC current would not cause an EMC issue.
The article "Common mode EMI noise suppression for bridgeless PFC converters" on page 292 gives the causation of
common mode noise. (this IEEE article is  now hard to find on www)

QUOTE>>>As we all know, CM noise is due to the voltage pulsating
generated by high-frequency switching. Such high dv/dt generates
CM noise currents which go through the parasitic capacitance
from converter to ground.<<<QUOTE

So yes, its di/dt, but interwoven with the current is the changing voltage aswell

As is known, DCDC's in cars and trains and aeroplanes all can produce radiated emissions....and that any  DCDC power supply PCB that produces radiated emissions, will inevitably present common mode conducted emissions. The article of the top post, says that common mode conducted emissions from a 2_lead_input DCDC would be zero...this is not the case.

As can be seen on page 36 of the following....common mode noise currents can indeed be created in a 2_lead_input DCDC,
This page (36) also shows how they can be caused by the drain of the switching mosfet......
https://www.vicorpower.com/documents/design_guides/DG-DCM-Design-Guide-VICOR.pdf
________________________________________________________ ______________________________________________________________
As is known, with a 2_lead_input DCDC, the module is often housed in a metal enclosure/heatsink.
The metal of the enclosure is often not permitted to be connected to any of the circuit conductors.
In such cases, the metal enclosure is still declared as the "EMI ground" or "chassis ground".
And as such, the circuit power inputs and outputs are often connected to the metal enclosure via Y capacitors.
This is to reduce common mode noise of the 2_lead_input DCDC.

So, the actual chassis GND  , as discussed, is often not directly (DC) connected to the circuit conductors,
but often is made to be a copper plane in a certain layer of the DCDC's PCB. This "chassis plane"
, in part, serves to capacitively couple to the circuit conductors so as to re-route disturbances
that would otherwise  manifest as common mode noise. Ie capacitively re-route noise back to the
circuit so that it doesnt go off as common mode noise.

You keep going to all these different circuits and app notes to try and prove errors in the original article. Add an EMI ground or chassis ground and connect a Y cap, it's no longer a two-lead supply. Look at the output and signals there and you're not looking at the differential currents in the input anymore. The original article looked at a VERY simplified circuit and claimed that common mode conducted current must be zero. Now you want to throw everything else that has been found as real-world parasitic concerns in there to refute the original claim. I don't think that anybody here has suggested that there are no real-world concerns that must be attended to in a design.

[Faringdon]

 

Add an EMI ground or chassis ground and connect a Y cap, it's no longer a two-lead supply.

Thanks,  and if a metal chassis is added to a DCDC, (ie its enclosure or heatsink) then its a very good idea to always connect Y caps from DCDC circuit to that  chassis anyway, for noise mitigation.


We all agree that the ti.com app note is correct from a totally idealised and non_real_world situation.
However, the people reading it are not professors, and need to be told that its an idealisation which never occurs in the real world...i have lost count of the number of companys where you get told
"we dont need a common mode filter or Y caps because we only have a 2_lead_input DCDC in a plastic enclosure."

There is not a conducted EMC test house  in the world that wont also test a 2_lead_input DCDC for common mode aswell as diff mode emissions.


I dont  know if there is anybody that would say "i have not connected my metal enclosure  to the DCDC inside it and therefore i dont need a common mode filter"
....this wouldnt happen, you would virtually always connect a  DCDC SMPS circuit (usually its ground)  to chassis with y caps.

Now if the DCDC's enclosure was entirely all plastic, then it would be a different story?.... However, the problem is that a DCDC does not  "know" whether it has an enclosure or not. If it exists somewhere on the planet earth, then the DCDC "thinks" that the surrounding earth is its enclosure.....and due to the earths enormous mass, it has low effective conductivity, and so even if inside a plastic enclosure, the 2_lead_input DCDC needs a common mode choke in its 2 lead input. The Y caps will be provided by the stray Y caps.

Even if we have a 2 lead input DCDC, in a plastic  case, and  fed from a battery......neither battery nor DCDC "knows" if it has a conductive enclosure or not.....they both think that the surrounding earth is their conductive enclosure, and so again, we have stray capacitance to the earth, (our  "third connection" and so we need the common mode filter.)

Here we see a common mode filter being designed for a DCDC

(3:10  onwards)

Also, we could just decide to take our 2_lead_input DCDC to a conducted EMC test house where they only
will test it for Differential mode emissions. -Though as you know, we cannot do that. All Conducted EMC test
houses will have a metal ground plane from the DUT to the LISN and so we have our "third conductor", and again
we have a common mode EMC problem. (even without the ground plane, we still  have the surrounding earth) -And indeed, the test house will test for these common mode conducted emissions.
So yes, i understand that what ti.com is saying is from an "idealised" point of view...but its not helpful without
them actually declaring that, since some people will try and solve failed conducted tests with only diff mode
filtration, because "they saw it in a ti.com app note"

I have actually been in a co that was doing a LED light for Boeing (they hoped Boeing would buy it, i doubt they ever did)....and they were saying that  they didnt
need a common mode filter because they only had a 2_lead_input.

At 3:48 on this video...

..we see that a 2_lead_input DCDC has big common mode problem.
I understand that we all appreciate and agree with this.
And as such, the problem with the ti.com article (and others its not just ti.com), is that referring to totally unrealistic ideal conditions which never occur, (without explaining the real world situation that actually dominates) is very very unhelpful to many of the people who
will end up reading that app note. (app notes dont  tend to get read by top consultant level designers and professors)

I also know of a company that designed SMPS for BAE systems......the gaffer of that company told me that a "2_lead_input"  SMPS that  he had had designed had "no common mode noise"
Obviously as we know, he had been reading stuff like that ti.com app note.

I gaurantee that their are huge numbers of  EMC test houses all over the world, giving failure reports to engineers who think they "only have a diff mode problem because theirs is a 2_lead_input DCDC in a plastic case".

At 9:16 of the below we see the 2_lead_input DCDC having its common mode path made by the EMC ground plane in the test lab.....


But typically,  most companies always think they dont have a common mode problem, and even if they do, they regard that it will be insignificant, which is deffo not the case.

The problem with Common mode chokes... specially with unisolated DCDC's. is that they put an impedance into the ground wire, when that is not wanted, for whatever reason.

Though another point, is how will any 2_lead_input SMPS with no common mode choke, and no impedance  in the ground plane.....how will it ever pass conducted immunity testing?....it won't.

[AnalogTodd]

Simplification and idealization is used so much in our world to make solving problems easier (not to mention teaching of difficult concepts). Do you take into account the few milliohms of impedance between every connection in a circuit? Very few people do in their designs. Once you get into the 'real world' you often run into these bits cropping up and throwing off your design. The difference between a good designer and a great designer is in being able to figure out what is happening and learn from their mistakes.

How many companies out there just have good designers that don't understand real world implications? You can usually tell by the number of failed projects being left in their wake. Didn't design it with proper filtering? It doesn't pass certifications and it goes on the junk pile when someone can't figure out why it fails. I was involved in figuring out that 40dB drop in supply rejection on a linear regulator that I showed. It could have been left alone and written off as circuit models in SPICE not being as accurate as possible. Instead, we spent time playing with the circuit and found out that the MLCC we had at the input of the regulator made things worse, then spent time figuring out WHY it did so.

In that same vein, there are also people who are great for writing this stuff out in technical articles and including the real world issues. There are also people who are crap at it. Who are authors that you trust their writing and circuits? Personally, I think Jim Williams and Bob Pease were great at getting the details that mattered included in their writing. I've written articles and app notes over the years. I was fortunate to have some of the best engineers in industry review them before publication. I've also been the reviewer of writing that others have done and found fundamental flaws in their arguments. If you don't have the right reviewers going over a technical piece those flaws may never get discovered. I will be one of the first to admit my writing isn't perfect--sometimes you re-read everything you wrote over and over and see what you meant for it to say instead of what it actually says. You can't see the forest because of all the trees blocking your view.

So why spend all this time and energy pointing out the mistakes others make? There are plenty of companies out there trying to do things based on those mistakes and the circuits end up in the trash. Instead, make a better circuit to sell. Are you worried that younger engineers may read this stuff and make mistakes based on it? Then be a mentor to engineers directly instead of in an anonymous internet forum.

Engineering is about designing the best possible solution for a problem at a price point that maximizes profits. A simpler solution may not work as well as a more expensive one, but it may be 'good enough' that it gets the sale. There are plenty of engineers out there who will design the low-end stuff that sells at profit margins that are barely sustainable and will make ends meet based on quantity sales. Those of us who design the higher end solutions don't get the number of sales as the low-end guys, but we make enough in profits from it to be comfortable.

[Faringdon]

So why spend all this time and energy pointing out the mistakes others make?

Thanks, thinking that there's no common mode noise in a non-isolated DCDC with 2 leads is one of the "rots" that has set into the west since they outsourced SMPS and general electronics to China. This is a very  basic situation of SMPS theory, and its needed to be known that a non isolated DCDC may well suffer common mode noise as its main problem (the harder one to solve) , a bigger problem than its diff mode noise.

Its well worth, if a 2 lead Buck dcdc has a metal enclosure, its well worth putting in a chassis plane into the PCB inner layers to act as the "plate" of a "stray" y capacitor.....so as to mitigate common mode noise.....ie, a chassis plain which is  directly connected to the metal chassis....and that  aswell as the "stray" y cap phenomenon, they should be "real"  y cap connected to the chassis plain aswell...eg GND gets Y cap connected to this chassis plain.

This applies to bucks and boosts too....aswell as to transformer isolated dcdcs...it isnt only transformer isolated smps that have a serious common mode problem.
And literally any SMPS also, can have a radiated emissions problem.

With the terrible mess we're now in...and have put ourselves in, the last thing we need is to start gassing off undeclared idealisations, which just send "the  less-well-informed" (ie the most of us) off down the wrong road.