Problem paralleling DC-DC converters.

[DanInvents]

Hi all!

I have tried to parallel two DC-DC converters following the guidelines shown in this EDN article https://www.edn.com/balancing-power-sharing-of-paralleled-boost-converters-in-speakers/. In addition, I filter the voltage after the rectifier diode with a capacitance multiplier. For some reason when I put a load at the combined output one of the DC-DC converter ICs overheats while the other stays cool. This happens when the output current is as low as 100 mA.

Any ideas what I have done wrong? Probably messing with the switcher feedback pin was not a good idea.

[Magnethicc]

it seem like you did not place R3 and R4 (figure 1 of the EDN article).
The idea is to create a voltage divider of each of the outputs and then using an differential integrator op-amp to sense if the two output are the same voltage and correct it if not.

By the looks of it, you did not create the voltage dividers, rather input the entire output voltages to the op-amp inputs.
I think it is very important to create this voltage divider since the VDD of the OP-AMP is one of the outputs.
If V_BOOST1 > V_BOOST2 and V_BOOST1 is the input of the op-amp then you are exceeding the maximum input of the op-amp.

[DanInvents]

Thank you for the answer! It seems that I did not have the thinking cap on! I thought that I could skip R3 and R4 because the author does so in Fig.3.

My idea behind using V_BOOST2 to power the op.amp was that, this way if the second boost converter would fail, the first one could still keep on working. Yep, stupid from my side. I should have used the combined output to power the amplifier.

[f4eru]

Ahumm, are those Q1 and Q2 an attempt at a ripple reduction using a linear "capacitance amplifier" ? That won't fly in the HF path of a boost converter.

This  absolutely will not achieve what you think it achieves: if ever this transistor opens fully on a load variation, and it does at startup, your boost coil voltage will rise uncontrollably, and the converter mosfet will get instantly toast. (or perhaps the NPN for that matter)
Remove this circuit, or get it after a first filter cap (knowing it will still sacrifice efficiency.)

Your current symmetrisation circuit probably has too much gain and bandwith.
 I recommend slow it down to 30 Hz or so to avoid bringing both converters to oscillate against each other, and make the effect of a full deviation lower by increasing R13

Furthermore, I think SW1 and F1 are somewhat mismatched. What for is a I_hold = 5,5A in a 0,3A switch ?

[thm_w]

Whats preventing you from using a single more powerful converter?
Or at these lowish currents just diode or-ing the outputs?

[DanInvents]

Thanks f4eru for such a detailed answer. I know that it is recommended to have a tight loop for the feedback pin of the DC-DC converter. However, I wanted to experiment with it and see what would happen by adding a capacitance multiplier to it in an attempt to reduce ripple. As you said, it is a terrible idea which makes me wonder, how does it even work at 100 mA output?

Interestingly, I have been using these kind of switches and passing amperes through them without issues. Could it be that the 300mA current rating is a nominal value?

[DanInvents]

As an answer to thm_w, the reason behind this design is learning and experimentation. I wanted to see if I could parallel two cheap DC-DC converters in a smart way balancing the current draw with an operational amplifier.

Perhaps or-ing the outputs would work, however in this case I want 1A out of each converter. The deviation in the feedback voltage and uneven heating of the diodes would mean that one of the modules would end up hogging all the current.

[thm_w]

Current sharing in diodes is not that bad: https://www.st.com/resource/en/application_note/an4381-current-sharing-in-parallel-diodes-stmicroelectronics.pdf
Forward voltage vs current will have a larger effect than temperature. The 100mR alone might be enough to balance it.

But yes if its for learning experience thats fine.

[Faringdon]

Good way to parallel is to use a different chip. with no internal error amp...(or one that you can bypass) then just use a single error amp externally to control the single (joint) output voltage from one divider...
Your pretty well garanteed good sharing then, with no sharing circuit (as such) required.