Author Topic: UC3902 Load share controller needs more explanation?  (Read 229 times)

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Online Faringdon

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UC3902 Load share controller needs more explanation?
« on: September 26, 2022, 06:32:06 pm »
The UC3902 claims to be able to make independent SMPS’s load share when paralleled.
However, the claim is somewhat contrived , as quite a lot of  extra setup needs to go into it…..and things like external circuit trace resistance, maximum allowable sense resistor voltage, etc etc, are not explained out in the UC3902 datasheet or app notes. This is why so many UC3902 based load share circuits simply don’t work.

The attached is an LTspice sim of whats needed to load share 3 linear regs….(SMPS sim takes too long).

This is the way it must be done…not with UC3902 and no extras….with the sim you can verify the sense res and trace res.
Is it time for UC3902 Apps docs to give the full picture needed to use it?

UC3902 datasheet:

Note the sim has a ref voltage added to the sensed voltages, also has error amp vref window limiting....these are essential for the sharing, but not even explained in any of the UC3902 app notes.....if these factors are not tuned to the application...sharing doesnt happen....the UC3902 app notes fail to make this clear.
« Last Edit: September 27, 2022, 07:43:10 pm by Faringdon »

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