The photos were very helpful. It looks like I was wrong about the 24-pin SOIC (part #1821-1690) being the DAC. The DAC is the AD7846.
The AD7846 is a single output DAC, but we know we need a bunch more outputs than that.
To get multiple outputs, I believe the 1821-1690 is an analog MUX with 12 or maybe 16 outputs. On each output of the MUX you can see a 100k resistor going to a holding capacitor. The should sequence through all the MUX outputs while setting the DAC to the value it wants for each output. It's a multi-channel sample & hold.
Most, if not all, of the outputs go to the dual LT1112 opamps. Looking the symmetry of the connections and components around the opamps, it appears there are 3 distinct groupings of opamp pairs. Since it's a dual opamp, each pair of packages would be involved with all four channels for offset or trigger level (or possibly something else). I have outlined them in the attached photo below. All this is my first guess, subject to revision as we poke around.
I would examine the output of each opamp group (2 packages = 4 outputs) to see what function they perform and whether you can find one output in the group that's not consistent with the others.
You mention you already found one that's not consistent. Can you be more specific? What are the voltage levels on chips/pins? Also, before measuring stuff, if there's a way to do it, you should set all the calibration constants to their default value.
There are 3 LT1112 that don't seem to have symmetric circuitry around them. They may be used for one-off functions such as the calibrator output, external trigger level, etc.
Perhaps I'm not understanding the problem completely, but are you saying the trigger level is offset too much, or the trace is offset too much? Are you able to control them?