Fixing a design mistake on a PCB

[transistor_fet]

I designed a PCB and had it printed but I made a mistake in the design. A chip select signal going to two memory chips actually needs to be split and each chip CS should be contingent on on one of two other select signals (a high or low byte select, which could both be active at the same time). It only matters for the write cycle, so it could also be tied into that signal instead. Normally I'd use an OR gate for each chip select, since all the signals are active low, but the trouble is I only have one spare OR gate on the board (and one spare inverter). Is there some kind of hack I could do (cutting tracing, soldering jumper wires, maybe adding discrete parts) to get the effect of combining the signals without redesigning and reprinting the board? Thanks

[duak]

If I get the gist correctly, you need:

CS/   HI/   LO/   CS.H/   CS.LO/
 1      X      X         1           1
 0      0      1          0           1
 0      1      0          1           0
 0      0      0          0           0
(from logic)        (to chips)
0 is low, 1 is high, X is don't care

If so, you should be able to use a PMOSFET as a transmission gate between CS/ and the CS/ input on each chip.  The drains of the FETS are connected to CS/, the sources go to the chip and the gates come from the HI/ and LO/ byte select.  Pull up resistors are needed on the sources to ensure a high CS/ input when the FET is not conducting.

You'll want a small FET that doesn't have too much gate capacitance.  Is Vcc 5 V?  If so, just about any PMOSFET will work.  If Vcc is 3.3 V or lower, a FET with a lower gate threshold is needed.  The pullups are in the range of 4K7 to 10 K.

You may find it easier to piggyback another OR gate on top of a similar sized chip and wire the appropriate pins.

PS., I layed out an interface board completely upside down once. D'oh!  It had a couple of DIP chips on it so I had to fold their leads over to get them to connect and allow me to at least test out the circuit while the layout was respun.

[transistor_fet]

Yes, that's the truth table I need, and 5V. This sounds really promising, thanks! I just need to order some p channel mosfets since I only have BS170s on hand =P

[Ian.M]

Since you've got to order parts anyway, it would be neater and give better signal integrity with a far lower parts count to 'dead bug' a dual OR gate (e.g. 74LVC2G32) in a leadless package at a point where the /CS trace can be split.  If the layout isn't amenable to that because of other devices on the same /CS trace further down it, you could use individual OR gates (e.g. 74LVC1G32) next to each memory chip