Author Topic: Has anyone replaced HP8591(E) SRAM by FRAM?  (Read 6780 times)

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Offline GreybeardTopic starter

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Has anyone replaced HP8591(E) SRAM by FRAM?
« on: December 09, 2024, 11:15:11 pm »
Has anyone tried to replace HP8591(E) SRAM by FRAM?
I want to get rid of the damn lithium battery holding calibration data in SRAM.
 

Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #1 on: December 12, 2024, 11:41:21 pm »
I haven’t seen one but it’s an awesome idea. I have an 8594E and I replaced the battery few years ago.
We would need a 256k x 16 FRAM, probably 4 level translator chips, there are no 256k 5V chips, a 3.3V regulator and couple more gates. I can’t find the connector part number.

Cheers,
Miti

Edit: There is an old model of memory board and a new one. I have the new type.
« Last Edit: December 12, 2024, 11:51:06 pm by Miti »
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Offline GreybeardTopic starter

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #2 on: December 13, 2024, 01:40:25 pm »
I don't know if my memory board is new or old but it's the same as described in the attached pdf.
 

Online squadchannel

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #3 on: December 13, 2024, 02:03:05 pm »
FM16/18 cannot be used without circuit modification due to differences in CE pin control. (See the datasheet for details.)
FM28V is improved in this respect and fully compatible with SRAM, but it is 3.3V instead of 5V.

I used TI LSF0108/0204. confirmed that it works with DALLAS NVRAM, and it should work with SRAM as well. :popcorn:

 
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Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #4 on: December 13, 2024, 03:48:42 pm »
@Greybeard. That is the new style.
@squadchannel. Take a look at FM22L16. It is drop in replacement for SRAM, no multiple CE toggle rubbish, and I happen to have a hand full of them.
There’s also non volatile SRAM option and they are cheaper. They use QuantumTrap nonvolatile elements ??? and they save the content at power down.
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Online MarkL

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #5 on: December 13, 2024, 04:48:28 pm »
Has anyone tried to replace HP8591(E) SRAM by FRAM?
I want to get rid of the damn lithium battery holding calibration data in SRAM.
That lithium battery also keeps the RTC running on the main board.

You might be able to design in a super-cap, if it will keep the RTC running long enough for you during power off.
 
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Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #6 on: December 13, 2024, 05:04:46 pm »
Aah, good point. I can add a small coin battery for the RTC.
Another thing is the RAM also keeps the personalities, for example I have EMC personality. It would be good to copy the RAM into the FRAM.
« Last Edit: December 13, 2024, 05:06:51 pm by Miti »
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Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #7 on: December 13, 2024, 06:37:51 pm »
I think the part number for the connector is 1734101-5 from TE Connectivity.
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Offline GreybeardTopic starter

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #8 on: December 14, 2024, 06:48:57 pm »
We would need a 256k x 16 FRAM, probably 4 level translator chips, there are no 256k 5V chips, a 3.3V regulator and couple more gates.
Don't we need 2 separate 128k x 16 bit FRAM/MRAM/NVSRAM for the 2 separate (probably interlaced) CE lines?

I'm not quite sure if you can remap the 2 CE lines to the double address space easily.
« Last Edit: December 14, 2024, 06:52:16 pm by Greybeard »
 

Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #9 on: December 14, 2024, 10:29:12 pm »
We would need a 256k x 16 FRAM, probably 4 level translator chips, there are no 256k 5V chips, a 3.3V regulator and couple more gates.
Don't we need 2 separate 128k x 16 bit FRAM/MRAM/NVSRAM for the 2 separate (probably interlaced) CE lines?

I'm not quite sure if you can remap the 2 CE lines to the double address space easily.

You may be right and that is becase of byte writing. The way I read the schematic is this:

1. There are two 16 bit memory blocks. LUSERRAM0 (U1, U2) and LUSERRAM1 (U6, U7). These cannot be active simultaneously because there would be conflict.
    If this is correct we can use LUSERRAM1 as an address input.
2. There's only one output enable LOE that goes to all four chips so no worries there.
3. Writing can happen on the upper or lower byte or both, controlled by LLW and LUW and that's a problem.

Even more, depending on the processor speed, I don't think 14.7423MHz is that fast though, this FRAM may be too slow. The SRAM read and write cycle time is 70nS, the FRAM is 110nS.
We'd have to measure the memory access timing to see if the FRAM is an option. If it is, LCSC has FM22L16 at ~11USD, not too bad, we need 2 per. Unless the access is very slow and we can make UB, LB and WE from LLW and LUW, in which case one chip is enough.  :box:
« Last Edit: December 14, 2024, 10:38:36 pm by Miti »
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Offline GreybeardTopic starter

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #10 on: December 15, 2024, 12:33:33 am »
OK, that sounds “a little” more difficult than I had hoped…  :-\
 

Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #11 on: December 15, 2024, 12:56:48 am »
OK, that sounds “a little” more difficult than I had hoped…  :-\

Looking at Motorola 68000, looks like it needs a minimum of 4 clock cycles for a write so I think we are safe.
If my calculations are correct, the write cycle time is about 271nS. Same for reading.
« Last Edit: December 15, 2024, 12:26:16 pm by Miti »
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Online squadchannel

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #12 on: December 15, 2024, 01:05:55 am »
WE,OE? will probably conflict. if they don't conflict, could use a 16Bit FM22L16, but have to build a board that straddles the two ROMs. not my preference. :scared:
also, yeah, it slow.

my choice the 90ns FM28V100, but at $40(each $10). >:D
used to be able to get it for $10, but it's getting so expensive. jlc sell $10.
« Last Edit: December 15, 2024, 01:12:34 am by squadchannel »
 

Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #13 on: December 18, 2024, 02:14:10 pm »
Does anybody knows an IC that can delay a falling edge of a digital signal with minimum delay on the rising edge?

Thanks,
Miti
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Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #14 on: December 20, 2024, 03:53:07 am »
I have a preliminary schematic. Can you please review and comment? What's missing is a supervisor.
« Last Edit: December 20, 2024, 03:57:34 am by Miti »
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Offline GreybeardTopic starter

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #15 on: December 25, 2024, 01:48:47 pm »
Looks reasonable, but I can't say much about it.
I'm not a bus timing specialist and I don't know anything specific about the timing of the two OE CE signals.
« Last Edit: December 27, 2024, 09:17:44 pm by Greybeard »
 

Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #16 on: December 27, 2024, 03:02:20 am »
Looks reasonable, but I can't say much about it.
I'm not a bus timing specialist and I don't know anything specific about the timing of the two OE signals.

Which two OE signals?
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Offline GreybeardTopic starter

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #17 on: December 27, 2024, 09:16:01 pm »
Which two OE signals?

Sorry, I meant CE ...

« Last Edit: December 27, 2024, 09:19:50 pm by Greybeard »
 

Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #18 on: December 30, 2024, 05:11:25 pm »
Bad news, I should have scoped the signals before going too deep down the rabbit hole. The fastest write time is 100ns while the FM22L16 access time is 110ns. See below the scope shots for LLW and LUW. Most writes are 16 bits but I've caught few 8 bits writes as you can see. We need a faster FRAM or NVRAM.

Edit: Oops, I was looking at the wrong parameters. Assuming the writing is controlled by WE , the minimum WE pulse twp for FM22L16 is 16nS, in our instrument case it is 100nS. The cycle time is between two WE pulses and it is, as guessed before, about 271.32 nS, four clocks of 14.7423MHz. Back to it.
« Last Edit: January 01, 2025, 08:14:33 pm by Miti »
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Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #19 on: January 07, 2025, 03:00:42 pm »
I have a question about the bidirectional level translators such as TXB0108. I see it has an OE pin for the LV side. Can I connect it to Vcc or does it have to be controlled? What happens with the 5V side if I tristate the memory side and the LV pins are left floating? I’m asking because the enable time Ten is 1uS and it is a killer.  :palm:

Cheers,
Miti
« Last Edit: January 07, 2025, 03:38:03 pm by Miti »
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Online MarkL

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #20 on: January 07, 2025, 09:38:09 pm »
I have a question about the bidirectional level translators such as TXB0108. I see it has an OE pin for the LV side. Can I connect it to Vcc or does it have to be controlled? What happens with the 5V side if I tristate the memory side and the LV pins are left floating? I’m asking because the enable time Ten is 1uS and it is a killer.  :palm:

Cheers,
Miti
You might want to control OE if you have a partial power-down application (meaning power-down on the VCCB side).  Otherwise it does not need to be controlled, which is the situation here.  You should tie it to VCCA since it is referenced to VCCA.

However, you should read the section about pullups in the datasheet: 7.3.5 Pullup or Pulldown Resistors on I/O Lines, and 8.2.2 Detailed Design Procedure.  The TXB0108 presents weak pullups and pulldowns to both sides of the translation so that either side can force the bus to the desired state.  If there's other pullups or pulldowns it can interfere with this operation.  The 859xE series has a 10k resistor array (U11) plus R19 (for qty 16) to provide pullups on the data bus (see block E on the processor schematic).  These pullups are going to interfere with the TXB0108.

Also, the data bus goes a lot of places, so 7.3.3 Output Load Considerations, which talks about capacitive load, could also be a concern.

I would recommend to design with standard bus drivers and create the logic to control direction.  These automatic bidirectional drivers sound like a dream come true, but I've always found a reason not to use them in my designs.
 
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Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #21 on: January 09, 2025, 07:59:24 pm »
Thanks Mark, yes I saw the 4K resistors series with the drivers but I missed the 10K pull-ups. Would 74LVC4245 be a good choice? And what would be the direction and the OE logic?
I’m thinking LUSERRAM0 and LUSERRAM1 would control buffers OE and module OE would control direction. When FRAM OE is high, direction is CPU to memory.

Cheers,
Miti

Edit: Or maybe 74ALVC164245 but it may be harder to layout.
« Last Edit: January 09, 2025, 10:44:55 pm by Miti »
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Online MarkL

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #22 on: January 10, 2025, 08:42:35 pm »
The 74LVC4245 looks like a good choice.

The direction and OE control I think would have to be some combination of LUSERRAMx, LLW, and LOE.

Take a look at the existing memory HM628128 datasheet.  The /OE input going low does not always mean "from memory", specifically during Write Cycle Mode 2 (truth table below).  I don't know which mode HP is using and there is a PAL (U114) involved in the memory signal controls, so the behavior can't be determined by the schematic alone.  To be safe you should probably emulate all combinations of the HM628128, but you could also scope the memory control lines and figure out exactly what they're doing, which may allow you to simplify the new control logic (for example, they only use Write Cycle Mode 1).

I think 74ALVC164245 would work too.  The layout doesn't look too bad.  At least all the A's and B's are on opposite sides, so it's still flow-thru.
 
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Online Miti

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #23 on: January 11, 2025, 06:21:32 pm »
Ok, I've checked. OE is always high when either LLW or LUW goes low. I'll assume mode 1. Do you have any reason to believe it uses mixed modes?
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Online MarkL

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Re: Has anyone replaced HP8591(E) SRAM by FRAM?
« Reply #24 on: January 11, 2025, 11:38:45 pm »
I wouldn't expect them to mix modes.  As long as you didn't catch it doing Mode 2 you should be ok.  I think they would probably only use Mode 2 if they decided not to control /OE at all.
 


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