Electronics > Repair
Has anyone replaced HP8591(E) SRAM by FRAM?
Miti:
Ok, I think I have a schematic and a very preliminary PCB. Could you please take a look and see if you can find any error?
Thanks,
Miti
MarkL:
I would suggest a 10k pullup on /CE to make sure it stays high through power cycle, as per the FM22L16 datasheet.
In the scope capture in Reply #18, it would be better to trigger on LUSERRAMx == LOW (HM638128 /CE == LOW). LLW and LUW might be toggling with peripheral accesses, and if so, you're not necessarily capturing exclusively what the HM638128 is experiencing.
Can you post a capture of LxW, LOE, LUSERRAMx signals during a memory read cycle, and during a memory write cycle?
Greybeard:
Very well done. :-+
U6 is missing in the PCB view.
Miti:
--- Quote from: Greybeard on January 15, 2025, 12:40:15 am ---Very well done. :-+
U6 is missing in the PCB view.
--- End quote ---
This is dynamic. I've already modified the schematic. As I said, the PCB was very preliminary.
Miti:
--- Quote from: MarkL on January 14, 2025, 09:03:07 pm ---I would suggest a 10k pullup on /CE to make sure it stays high through power cycle, as per the FM22L16 datasheet.
In the scope capture in Reply #18, it would be better to trigger on LUSERRAMx == LOW (HM638128 /CE == LOW). LLW and LUW might be toggling with peripheral accesses, and if so, you're not necessarily capturing exclusively what the HM638128 is experiencing.
Can you post a capture of LxW, LOE, LUSERRAMx signals during a memory read cycle, and during a memory write cycle?
--- End quote ---
Good catch with the pull-up resistor, thanks!
OK, I will in the weekend. Meanwhile here's a scope shot with LLW (CH1), LOE (CH2) and the address LSB (CH3). It looks like I caught a read, two write cycles, and another partial read.
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