max.wwwang:
The primary mode of operation for this entire family is
releasing magic smoke.

The operation may not be instantly obvious, because the primary power source is on the right of the functional diagram (Fig. 2) and is also the output. Consider S (source) being the ground reference. D (Drain) initially provides voltage through the primary of the transformer. At this point that is acting as a simple inductor with nearly zero current and hence voltage on D being nearly nothing. Since the chip sucks a tiny current, the inductor charges and voltage on D slowly rises. At some point it’s enough so the initial 5.8V voltage regulator can provide voltage, which charges the bypass (BP) capacitor. That capacitor serves as a reservoir of energy for later operation. That’s needed, because turning off the main MOSFET will cause huge oscillations, which will temporarily make the internal voltage regulator deliver nothing. To this point we have established where the chip is powered from.
Initially the ENABLE signal (EN/UV) is logical TRUE. In absence of current or any fault/overheat detection signal, the internal state machine enables the built-in power MOSFET. On the right in Fig. 2; the huge area with regular lines pattern area in my photos. It allows large current to flow, pulling the transformer’s primary down. That provides current to appear on secondary, charging the DC output capacitor.
At some point the DC output voltage is hight enough to trigger the feedback optoisolator (bottom right in Fug. 1), which pulls EN/UV down (logical FALSE), signaling that the voltage is high enough. That tells chip’s internal logic that it
may turn MOSFET off. After which the entire process repeats. Note I used word “may”. It seems that with this family the cycle is still determined by the internal logic and EN/UV is just taken into account while taking decision about starting the next charging cycle and not forcefully turning the MOSFET off instantly. That is because those chips try not to maintain stable voltage, but pull fixed current. You may see that in the charts in Fig. 6 to 9 with a complete cycle being performed, while feedback voltage going down only preventing the next one from starting.
The devices also incorporate a bunch of additional logic related to detecting and reacting to abnormal conditions, like undervoltage and too high current over MOSFET.