How to Adjust the AD834 Circuit

[daisizhou]

The circuit schematic is as follows.I use a 500KHZ sine wave signal generator as the signal source.Tested the TP4 TP5 TP6 voltage value according to the DBM value and VRMS value corresponding to the 50 ohm load.
TP5 voltage is equal to TP4 voltage amplified by 10 times.TP6 voltage is equal to TP4 voltage amplified by 100 times.
Look at the data TP5 TP6 data At the end (where the red circle is drawn) the voltage amplification has entered the cut-off area.

How do I adjust it to be correct?If you know please let me know, thanks for your help

[dzseki]

Is this circuit your design?
A couple of points I see:
-Why do you have three opamp stages cascaded on the output, while you you could do that in one shot.
-Are you sure the AD834 is treated well? The power supply feed resistors are not equal 160R vs. 10R while due to the differential nature of the IC the quiescent current is roughly the same (the bias current on the output to be exact, which makes most of the quiescent current).
-The RC network (100R + 100nF) on the output of the AD834 will make a corner frequency of about 16kHz.
-Also the AD834 has "open collector" output, so connecting a cap directly to the output is also not a very good idea.

[daisizhou]

-This circuit is not designed by me, I am debugging this circuit.
-Because TP4 (S3), TP5 (S2), TP6 (S1) are connected to the analog switch chip, and finally connected to the AD chip, and then processed by the single-chip microcomputer, the output is cascaded with three operational amplifiers
-I didn't change the circuit, I checked the actual picture, the only difference is that the R33 (47K) resistor was removed, and the R29 (47K resistor value was replaced with 22K)
Because when I input 2dbm (0.282mv), TP6 has reached 6.006V, and then high, TP6 has not changed.
I want to get the correct change

[dzseki]

Ok, look at this:
AN-212
There is your circuit right on figure 3! I'm sure with the help of the circuit description you should be able to figure out what's the problem.

[daisizhou]

Thanks for your reply, I need to translate it to try to understand due to language differences, but it's hard.
I tried adding two 200nf capacitors at C50 and C51 and found that the minimum voltage of TP2-TP3 decreased further, the minimum reached 0.17mv, the TP6 test point seemed to improve, but as I further increased the capacitor value at C50 and C51 , the TP2-TP3 voltage difference becomes larger again
I don't know which modification is correct