First post here, and sorry for the length. I didn't want to leave too much out.
If you are willing to read this post: Thank you for your time!
TL:DR? Go to the last section please!
I have a Craft Certificate in electronics but I have never worked in the field, so my knowledge is limited.
Don't trust my logic or measurements!
Service manual found here: https://www.synthxl.com/wp-content/uploads/2019/07/Roland-SDE-1000-service-notes.pdf
Please jump directly to page 17 for the schematics.This is by far the most complicated troubleshooting in my hobbyist career.
Equipment I've used so far is a Siglent 200MHz 2ch DSOscope, a Siglent 5MHz sig-gen, a not the cheapest but certainly not a Fluke DMM, and a Minipro TL866+
For all sig-gen testing I've used a 1KHz 0.22 VPP sine on the units input.
Long story short:
I got this Roland SDE1000 mono delay audio effects from 1984 about 5 years ago.
When I got it, it powered up and ran for about a minute or two.
It then started all of a sudden to glitch out, displaying garbage in the VFD display and the audio that was still active in the RAM was looping and starting to distort.
No further audio input was being processed.
The unit was then immediately powered off for a quick smell and visual inspection.
No magic smoke or heat was found.
I let it cool off for an hour and it then started up again, but this time for a couple of seconds before glitching.
Later it would only start up again when the unit itself was cooled down to way below room temperature.
My logic back then was: recap psu and change rectifier bridges.
This didn't change much, except that now the display would either be "8.8.8.8." or "....", when it should be displaying the delay time in milliseconds, as in sitting idle or frozen.
I wasn't that good at meassuring ripple and finding all the rails and such but the +15- -15 +5 and +12 looked OK.
+15 and -15 transistors are a pair of 2SA968/2SA2238 that runs hot, but not scorching hot.
Apart from them, no component run suspiciously hot.
Now I'm a bit wiser as this is the last unit in my "too hard to fix yet" pile.
Ripple on the +5V, -15 and +12 has very little ripple after the psu overhaul, but the +15 rail has about 0.5 - 0.6V ripple.
More on this later!
VDD is 5V and VCC is 4.88V
At first I was focused on the digital domain (maybe a bit too much, more later).
I was first suspecting reset and generation of both the clocks to the main controller IC12 and CPU/co-processor IC21.
Reset circuit was doing as it should do.
CPU (IC21, a custom 80C49)
The 11MHz sine was measured on the X2 pin swinging steady between +1V to 3.9V without refference to ground on my probe, and 0.8V to 4V with reference to chassis ground.
Yes, this unit has a mains ground plug, and is being used.
I'm still a bit confused about when the ground lug should be used, but I've learned to be sceptical about using it.
All the P(nn) and DataBus pins have little (mV noise?) to no activity.
The P(nn) ports which where inputs from the foot controller jacks on the back of the unit where tested with a foot switch and all had the correct responses on the CPU inputs.
T1 input from Main Controller (IC12) is correct with a clean 40 to 44Hz 5v pulse that correspond with the position of the Delay Time X1-X1.5 potmeter position.
My biggest fear here is that the CPU is toast as it has a custom PROM on it.
I did out of curiosity meassure the ALE pin, and there is steady activity there.
Could this mean that the CPU is most likely OK?
If you jump to page 9 in the SM you see a CPU Modes section in the middle.
What I've found is that the CPU state is in row 2 on the Normal Mode, which should indicate that the CPU is actually running.
Almost all logic chips have been desoldered and verified with the TL866 except the 7407 buffers before the dac.
Next is the main controller IC12.
MSCK clock input is abit hard to measure with a probe as it either distorts very or has weird ringing on the top and bottomn part with and without reference to chassis ground,
But HDCK which is generated from this clock is generated so I believe it to be OK.
All the address lines to RAM show healthy activity, although the output from the ram seems like weak digital noise.
Since the 1KHz sine arrives healthy at the DAC side later, I believe the output to be OK.
Data outputs to the resistor ladder DAC show healthy activity.
SAH (Sample and hold) is as expected according to the manual.
DATA and SIFT (Shift) has no activity from the CPU IC21. I forgot to log if it was high or low though.
Now, I believe I'm onto something:
DIN which seems to have a digital pulse going but has a very noisy low phase, as in down to -0.5V switching noise.This signal is according to what I understand the data that is part of the calculation of the delay time which should be written to the VFD.
The last discovery was actually made during my attempt to broaden the horizon and focus on the analog domain as my gutfeeling told me there must be a point where the analog meets the digital for preset storage and control.
I started to trace backwards at Delay Out IC28 (opamp), and what did I see?
After a cold start, the 1kHz signal from the sig-gen would gradually stabilize after 5-7secs, BUT after about 15-20 seconds would slowly become unstable and starting to look like a mayhem taking place, as in full rail noise and then gradually dying out.
That is excactly what happened when I first got it!
I then traced more backwards and found the same behaviour all the way back to the Comparator IC2 Pin 3, marked as test point 3 in the schematics. Pin 2 has a clean signal.
According to the schematics it's a NJM311D but in reality a NEC C271C.
This is the very chip that generates the DIN signal to the Main Controller IC21 on pin 7 (D23 is tested ok with DMM)
A small step backwards from IC2 pin 3 we have Q10 which shows a healthy sine. Should this indicate that the circuit backwards to the 7404 buffers is ok?
7407 has all healthy inputs/outputs.
Right next to it we have Q9, an n-channel JFET K30A GR that I believe is the source for everything:A 0,5V ripple/leakage on the +15 rail it sits on and feeds Comparator with noise so the data to DIN on main controller gets garbled, freaking out the controller.
Am I onto something here?
Could this JFET really cause ripple on the supply? and in worst case, destroy the input DIN on the Main Controller?
Stress testing a JFET is a bit out of my grasp.
Or is the +15V driver transistor really the culprit?
Q43 (K117 GR) marked in the top north-east in the schematics, is often mentioned as being leaky, causing a drift in the delay display time. I haven't thought of it as critical so far as the output looks fine.
Is there anything nearby I also should check before I try to find a replacement/equivalent for a K30A GR?
If any of you have a large stock of K30A GR and K117 GR and are willing to donate one or two for shipping to Norway, I'm all ears.
The nearby IC5 4066 tested OK out of circuit with the TL866.
If you made it down here:
Again, thanks a bunch for your time!
Mvh
Trond