Electronics > Repair
Series defect on agilent 167xx boards?
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MarkL:

--- Quote from: MarkL on March 27, 2023, 01:52:45 pm ---...
Hmmm...  I could be wrong about the testing path, or maybe only some of the signals are routed through the Virtex.  I'll have to take a closer look at that.

--- End quote ---
I'm remembering now where I got the idea the memory access goes through the Virtex FPGA chips on the 1674x and 1675x cards.

I looked again on a 1675x card that has a Virtex FPGA (U52) and an acquisition ASIC (U45) removed.  Along with a continuity tester, I can tell that the memory address, data, and control lines go to the Virtex by way of the (many) 33R resistor packs in the vicinity of the Virtexes.  They are series termination resistors for the memory signals.

A data/control bus from the Altera MAX runs up the top of the board in the center, ducks under to inner layer(s), and goes to the Virtex pads (different pads than the memory).  I believe this is the path for memory access from the backplane.  There appear to be a couple of traces that are also part of this bus that run on the bottom center with another bus.  They are on the outside edges of the other bus.

The "other" data/control bus on the bottom services the acquisition ASICs.  It appears to be a 16-bit bus.  It also services the DAC AD7841AS (U39).  Since the DAC has a known pinout, it's possible to figure out the specific bit assignments for the bottom bus, if it was useful to know.

FYI.
fpgaarcade:
I managed to get hold of a couple of very duff cards and I'll start to reverse engineer the front end.
I've been chatting to Keith who took these excellent pictures :
https://www.techtravels.org/2021/02/hp-agilent-5382a-tear-down-with-photos/

Here is a picture of the termination network inside the flying wire "blob"
The documentation says it's a 250R to the signal, and then a 90.9K in parallel with a 8.2pF cap.

I removed the cap, and the resistor values measure as expected.

What's also interesting is the wire to the tip is just a normal unscreened wire, and the longer one is two core, not coax.

I don't destroy these cables lightly, they were a bit damaged... 

Looking at replacement cables,  the long run is lossy coax, measuring 178R for 135CM, so about 130R/meter.  Given the 90K on the tip, lossless coax probably isn't going to make too much difference to the levels.
(Samtec can't provide lossy)
fpgaarcade:
And a nearly in focus picture of the front end.
6 components in the rx termination network. I'll remove and figure out how to measure.
alm:

--- Quote from: fpgaarcade on April 18, 2023, 08:34:23 am ---Looking at replacement cables,  the long run is lossy coax, measuring 178R for 135CM, so about 130R/meter.  Given the 90K on the tip, lossless coax probably isn't going to make too much difference to the levels.
(Samtec can't provide lossy)

--- End quote ---
It's not for the levels, it's to improve flatness of the frequency response, or in other words to dampen any ringing due to impedance mismatches between the coax and both ends. Using regular Z0 coax would distort the edges with reflections bouncing up and down the long coax. See the 1969 publication Tektronix Oscilloscope Probe Circuit Concepts book starting at page 14.
fpgaarcade:
Hi,
I'm aware of the reasoning behind the lossy coax, it's discussed somewhat in the patent https://patents.google.com/patent/US4777326

My view, and this is yet to be proved in practice, is a standard 50R cable such as the samtec EQCD will work "good enough" - certainly better than other hobbyist probing solutions.
We transport GHz signals over these at work, but they are correctly terminated.

I think there is a enough resistance in the existing termination and matching networks that it will be sufficiently damped. I was worried that 180R less cable resistance would throw off the comparator levels but the difference is tiny over all.

As I can't source lossy coax ribbon, the only solution is to add a series R ~50Ohm at either end of the cable. Any other ideas are most welcome.

I plan to run some simulations when I have measured the front end component values, but really testing with a pulse generator and high bandwidth 'scope measurement at the comparator input will be needed.

/Mike

btw that Tek book is a useful reference, thanks.
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