Electronics > Repair

Series defect on agilent 167xx boards?

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MarkL:
Ah, it's good that you at least have traces on the screen.  The waveform capture and the signal path to the ADCs is working.  That side of things is a real bear to troubleshoot.

Does the offset control move the traces around?  The fact that the traces are somewhat near the middle of the screen would imply the offset might be working.

My initial guess is that there's a problem with the trigger level.

Will it trigger on the other channel?  Probably not, based on the calibration output.  If not, we're probably looking at something in the DAC area that's common to both channels.

Can you get it to trigger by giving it a very large signal that's way off the screen?  Can you get it to trigger by moving the trigger control to the + and - extremes?

One thing you can do is look at the trigger level input to the analog trigger chip/section.  There are at least 3 versions of these boards.  Some have the analog trigger implemented with discrete ECL.  Can you post a picture of the top of your board?

Although better to probe the trigger level at the analog trigger section, you can also probe the trigger level in the DAC area.  Attached is a photo of the probe locations.  Do the trigger voltage levels change when you move the trigger control knob/menu?

Here are my notes from one particular card.  Your values are going to be a little different and depend on the stored calibration values.  It's probably obvious, but the scope must be running (acquiring) for it to update the DAC with any new trigger and offset values as you are changing them.

  Trigger position outputs from DAC area
    Condition Ch1/Ch2: Offset = 0.000V, 1.0V/div
 
      Trigger Level               Ch1 (V)  Ch2 (V)
      -----------------------     -------  -------
      Top graticule (+4.0v)       +0.297   +0.265
      Center graticule (0.0V)     +0.055   +0.027
      Bottom graticule (-4.0v)    -0.187   -0.211
 
  Offset position outputs from DAC area
    Condition Ch1/Ch2: Trigger = 0.000V, 1.0V/div
 
      Offset Level                Ch1 (V)  Ch2 (V)
      -----------------------     -------  -------
      Top graticule (-4.0v)       -0.177   -0.173
      Center graticule (0.0V)     -0.032   -0.026
      Bottom graticule (+4.0v)    +0.114   +0.121


Here's a good calibration from logictrig.file, if it helps:

  freq = 9.99985e+07, startable osc DAC = 7000
  Max Delay: No Trigger found
  Min Delay, Rising Edge: Yes Trigger found
    DurationCount = 1  DurationClock = 1
    DurationCount = 1  DurationClock = 0
    DurationCount = 0  DurationClock = 1
    DurationCount = 0  DurationClock = 0
    DurationCount = -1  DurationClock = 1
    Delay Adjust = 31
    Delay Adjust = 15
    Delay Adjust = 23
    Delay Adjust = 19
    Delay Adjust = 21
    Delay Adjust = 22
  DelayAdj = 22  DurationCount = -1  DurationClock = 1

I've attached all the files from a good calibration from two cards.  I'll take a look through your files and post again if I see anything that might help.

There's a lot of opamps in the DAC section.  One quick troubleshooting method is to get the pinout for each opamp and compare the inverting and non-inverting inputs.  The difference should be 0V.  This is a good first pass that can catch failing feedback networks, assuming none of them are being used as comparators which I haven't found to be the case (at least yet).

Another thing to check is the DC Cal output.  You can set the BNC to any voltage from 0 to +5.000V.  Try some different voltages and makes sure it works.


--- Quote from: DogP on February 08, 2022, 12:17:28 pm ---...
Based on the frequency mentioned, I assume this is the 100 MHz oscillator referred to in the theory of operation?  I see your DAC notes say CH5 goes to the "Startable Oscillator", so I think you're right that I need to start by looking at the DAC.  It sounds like the sample clock comes from the 100 MHz oscillator, so I'd expect that the oscillator itself is working.

--- End quote ---
To this day I'm still not sure what's meant by "Startable Oscillator", but you can certainly check the sample clock by setting up scope debug mode and then in the Calibration window new choices appear for the BNC output.  One of them is the 100MHz sample clock.  But given that you see waveforms, I think it's ok.

I think the first priority is to verify the trigger levels from the DAC.

DogP:
Thanks!  I just did some quick testing, and here are some quick answers... I'll dig deeper later tonight.

>Does the offset control move the traces around?
Yes (though I assumed that was just where the software draws the trace on the screen).

>Will it trigger on the other channel?
No, neither channel will trigger.

>Can you get it to trigger by giving it a very large signal that's way off the screen?
It doesn't seem like it... I put a large sine wave going in, which looked like a square wave on the screen, but no trigger.

>Can you get it to trigger by moving the trigger control to the + and - extremes?
Again, doesn't seem to.  I tried min, max, and 0 at min and max scale on both channels, but doesn't seem to trigger.  I also tried trigger immediate, which I would have expected to just work (doesn't depend on a trigger level or anything), but it didn't.  Also tried both "All" and "Partial" Acquisition Memory to Display.

>Can you post a picture of the top of your board?
Attached.

>You can set the BNC to any voltage from 0 to +5.000V.
Yes, this does work.  The manual says this is one output from the 16-channel DAC... does that mean the DAC is probably OK?

Thanks,
DogP

DogP:

--- Quote from: MarkL on February 07, 2022, 08:57:40 pm ---It looks like you still have copper on those vias.  They're probably ok but we can get back to them.  The first is in the timebase area and the other next to an ADC.  They shouldn't affect the operation of the DAC.

--- End quote ---
I think one or both of these vias might be my problem.  The picture kinda sucks (slightly better ones attached), but there's definitely no copper pad left on the bottom of the one, and the other is missing the copper pad on both the top and bottom.  With no copper pad on both the top and bottom, I assumed there's little or no via plating left either.

On the one with a pad still on the top, I put a small dot of solder, and let it flow down into the via a bit.  On the one with no pads, obviously solder wouldn't stick to anything... so I took a piece of 30 AWG wire and poked it into the hole, and put some solder on it.  It wouldn't go all the way through, so I pushed a wire in both sides, hoping maybe the solder would flow to any exposed copper left in the hole.

Anyway, I had little hope, but I popped it in, and IT WORKS.

So, any chance you can trace where those two vias connect to, so I can do a better permanent repair?  Theoretically, I can trace them right now... but I have little confidence in this hack reliably making contact while I'm pressing my DMM probe against it.


--- Quote from: MarkL on February 08, 2022, 07:06:01 pm ---To this day I'm still not sure what's meant by "Startable Oscillator"

--- End quote ---
I guess my assumption was that it's an oscillator with an enable line, but leave it to HP to complicate such a simple concept. ;)
https://patents.google.com/patent/US3921095A/en
Also discussed in the August 1978 HP Journal (and a few other HP Journals as well - I don't see any references outside of HP though)

Thanks,
DogP

MarkL:
That's great you got it working!

Perhaps step #0 should be: "Always fix everything that appears it might be bad, even if it looks like it has nothing to do with the issue you're chasing."  That's one from the software side, actually.

I buzzed out those two vias.  I called them A and B.  Photos attached.

I don't know their function, but maybe I'll set up the chassis again and see what signal is on them.  They certainly both go to the timebase area.

If you manage to break it again in the process of fixing the vias, would you mind seeing if the external trigger input and the external trigger output are working?  I think we would have found the trigger levels from the DAC were (and are) working properly, and this would have been the next step.  It could provide a little insight for next time someone has a trigger issue.  Thanks!

DogP:
>I buzzed out those two vias.  I called them A and B.  Photos attached.
Thanks!  Though the damaged vias don't visibly connect to anything, so there should be at least two endpoints for A and B, right?  Any idea where the other end(s) connect to?  Hmm... maybe the hybrid(s) since they're suspiciously close by?


>If you manage to break it again in the process of fixing the vias, would you mind seeing if the external trigger input and the external trigger output are working?
The odds seem pretty good that I'll break it again in the process, so yep, I can try that (especially likely if the one with w/ my wire through it is the cause).  Though I've never used external triggering on these scope cards... what's the best way to test?

It triggers on ECL levels, right?  I don't have much ECL stuff... can I drive it w/ a function generator, and what are safe input levels?  The manual seems to just discuss using those for daisy-chaining cards.  Is that an SMB connector?


Thanks,
DogP

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