Solartron 7081 Earthy Processor Board Reverse Engineering

[Eleclu]

A few months ago I purchased a Solartron 7081 on Ebay and the Earthy Processor Board was missing. So I took the schematics and designed a new pcb
The modernized design features a super cap for data storage, only two SMD SRAM-Chips and the original firmware on a single larger EPROM. The whole PCB is  routed on 2 layers and can be manufactured bei JLCPCB or PCBWay. Maybe someone may find this useful
If you have questions, feel free to ask.

[Kleinstein]

The super capacitor should likely only power part of the RAM. In the plan it looks like it would power the whole 5 V part.

At the EPROM  /OE is wired to GND. Not sure this is a good idea, as it could cause issues with a  DMA or if for some reason a write to a EPROM is address is done.

[Eleclu]

The negative terminal of the super cap is connected to the SRAM VSS-pins and Q2. When there isnt any 5V supply, Q2 will prohibit the currentflow to the rest of the circuit.
/OE is the output enable signal and must be pulled low (Take a look at the public available 7081 schematics).  The EPROM is UV erasable and this circuit will never try to write to it, nor the firmware. It can not provide the programming voltage.
This circuit runs in my multimeter for three weeks now without any issues.

[perdrix]

A fine piece of work!

My only concern would be that you made it two layer board as that's more likely to emit EMI that will interfere with the floating boards esp. the analogue board.

What software did you use for the design?   Was it KiCad or Multisim/Ultiboard?  If so would you be prepared to share the files?
Do you have a BOM as well?

David

[Eleclu]

Is the original earthy processor board really more then two layers? The earthy logic board is also only two layers and this board is original.
But maybe a four layer layout reduces the noise of the meter. This pcb be would not be as cheap. The size needs to be 16cm bei 15cm, so the original mounting hardware can be used.

This pcb was created with KiCAD. I included the whole project folder with BOM. Feel free to use it

Edit: Attached corrected files

[Kleinstein]

With a little care in the layout the EMI should be OK.

I would not expect EMI from the µC baord to make much difference with the meters noise. The main tricky point is EMI causing some extra offset depending on the signal source. The demodulation from RF to soem offset can be in the meter itself, but also at the DUT (e.g. ref. source).

AFAIR much of the noise is a thing of limited resolution for the faster conversions. With the slow 8 digit mode there is amplifier noise from multiple sources and thermal fluctuations can also become an issue.

[perdrix]

Is the original earthy processor board really more then two layers?
 :
 :
This pcb was created with KiCAD. I included the whole project folder with BOM. Feel free to use it

Yes, the original is a 4 layer board with +5VE and 0VE (GND) as inner planes. Correction it was a THREE layer board with a ground plane!

Many thanks for the project files, I will see what I can do to convert to a 4 layer board, and also maybe add the DAC that monitors the Data Address Bus (though that's probably only useful it you have the source code).   This won't happen soon though.

Cheers
David

[perdrix]

With a little care in the layout the EMI should be OK.

R723 in the ACV circuit was relocated to reduce pickup of EMI in later revisions of the floating analogue board.   So clearly, that was considered a problem.

David

[Gyro]

A sheet of thin copper foil, laminated in a reasonable weight laminating pouch, makes a decent EMI screen. Cut the copper sheet to shape if necessary before laminating and then cut the finished sheet to maintain a sealed margin around the foil. Obviously place / stick it as close to the earthly board and as far as possible from the floating analogue board.

[perdrix]

I just ran the DRC against the PCB:

Code: [Select]

** Found 3 DRC violations **
[clearance]: Clearance violation (netclass 'Default' clearance 0.2000 mm; actual 0.0000 mm)
    Rule: netclass 'Default'; Severity: error
    @(0.2500 mm, -0.3000 mm): Polygon on F.Cu
    @(26.0000 mm, 26.0000 mm): Zone [GND] on F.Cu
[lib_footprint_issues]: The current configuration does not include the library 'Custom'.
    Local override; Severity: warning
    @(113.0300 mm, 163.8300 mm): Footprint IC3
[lib_footprint_issues]: The current configuration does not include the library 'Custom'.
    Local override; Severity: warning
    @(92.7100 mm, 152.4000 mm): Footprint IC2.

I can understand it complaining about a missing footprint library for IC2 and IC3.   I don't quite understand why the clearance violation that seems associated to JP1 is happening?

David

[Eleclu]

I would like to make sure that my 2 layer pcb doesnt harm the meters noise performance. I will later post a graph of a little noise test.
Thank you perdrix  I didnt know that this is a 4 layer board. It shouldnt be to hard to convert this PCB to a 4 layer one. The large copper fills on the outside of the pcb could easily be moved to the inner layers. I didnt include this DAC, because on every version of this board I could find, it was never populated. This exact DAC is also a pretty expensive part today. But for completeness it doesnt hurt to include the necessary footprints.

@Gyro Do you mean a vertical shield between the earthy and floating halfes of the meter? Or between the 2 earthy boards?

Regarding the DRC. The clearance issue is very strange and I noticed this too. There is a little smd normally closed jumper link. This SMD jumper link is embedded in the large ground plane. I think the DRC complains about missing thermal relief or the copper pour getting in between the jumper pads. I ended up just ignoring this error, because it doesnt matter.

Here is a little test of my meter with drift correction enabled, 8x9 and test0V. Is this normal for this meter? I didnt do any modifications to it by now. I will change the floating firmware to the bugfix by MickleT.

[perdrix]

I just noticed this:



I'm sure that wasn't intended!

[Eleclu]

Yes this was definitly not intended. I will fix the mistakes and update the files.
Thank you for taking a careful look at the files
This mistake happend after some minor corrections, which were necessary as I tested the first pcb version.

[perdrix]

I've converted this to a 4 layer board, and have added the AD558.   I *think* I have that wired correctly ...

I've also fixed a number of DRC issues and converted to 8/8 rules (couldn't fix some DRCs without using 8 mil tracks), and added teardrops.

The work was done with Kicad 9.0.3

I have not yet had PCBs built ... going to order those next week.

Update: I've noticed a few areas where I can make improvements, so I've removed the zip file and will repost later.

David

[perdrix]

After a much longer delay than anticipated, here's the revised 4-layer board for checking.

I've corrected a number of errors which arose because the original Solartron schematic wasn't 100% accurate .  These include:

• Pullups for all of D0 to D7 - The pull-ups for D0 and D7 were shown incorrectly as connected to the RHS of IC 404.
  
• The connections to pins 1,8,17 of IC421 and IC422 were not shown correctly in the schematic - all those pins should be connected to +5V.

I've checked those against the PCB.

The other changes I've made are to:

• Convert to a 4-layer board, and exploit that for routing.
• Change to use mils rather than metric
• Renumber parts to match the original schematic where possible.
• Eliminate all DRC issues.

I still have to double check that I've not messed up the schematic revisions against your schematic and the original, but having your eyes checking as well will be good!!

Update: I've updated the project to include a project symbol and footprint library for the Kemet Supercap
Cheers
David

[perdrix]

I've corrected the footprints used for the LS138 decoders - they were way too wide for a SOIC part, and changed other footprints to use a socket.

I've also done some more clean-up, and added a component that isn't shown in any schematic: A 200pF capacitor between pins 8 and 9 of IC419 which was factory fitted underneath the board.

I attach the revised KiCAD project.

Any checking that you can do will be appreciated.

Update: revised PCB a bit after running the PCB through the HQDFM tool.

Further update: Project zip file removed - I found an error.  Pins 1, 8, and 11 of IC421 should connect to IC421 pin 1, as should pins 8 and 11 of IC422.   But pin 1 of IC422 should not be connected to pins 8 and 11 and should only connect to +5v.  There was a small solder bridge on the faulty board which I hadn't spotted previously which led me astray .   IOW the schematic was correct.

Cheers
David

[perdrix]

Hi Eleclu,

Please can you let me know your name so I can add proper attribution to the KiCad project and the PCB

Thanks
David

[perdrix]

I finally got the board built:



and it seems to be mostly OK.  Meter initialised and measured correctly.  After leaving it powered on for a while, the super-cap was sufficiently charged that it resumed rather than initialised.

Except for one problem (so far):  If I press the initialise button on the front panel, the beeper sounds and doesn’t stop doing so until I power down.

Does anyone have any ideas what’s wrong?

David

[Eleclu]

Hi perdrix,

This is an interesting problem. With my PCB I never had problems with the buzzer. Also the circuit vor the Buzzer is on the earthy logic board. Maybe the bit for the Buzzer gets stuck. But I would check the circuit on the earthy logic board first. If I have time later this day, I will take a deep lock into the schematics.

Best wishes

Eleclu

Edit: I thougth a little bit longer about your problem. The Buzzer is used when for example the range of the meter is changed. Does the Buzzer only get stuck if you press the initialize button?

[perdrix]

Problem found!   The Reset dip switch (S1) on the Earthy logic I/O board was in the DISABLE position, so the reset never occurred.

Now I’ve corrected that problem, the meter now works as I expect.

The download for the KiCad project is here:

https://groups.io/g/Solartron_Schlumberger_Equipment/files/Solartron%207071%20and%207081/Solartron-7081-Earthy-Processor-master.zip

and also on github at:

https://github.com/perdrix52/Solartron-7081-Earthy-Processor

David

[perdrix]

If anyone wants to build this, I have 7 bare boards available for GBP25 each and also have 5 programmed OTP EPROMs for GBP7.50 (all plus postage to wherever you live).

PM or email me direct [mailto:david.partridge@perdrix.co.uk] if you are interested.

Eleclu gets a free board if he wants one!

David

[Eleclu]

I am glad to hear you found the problem

Thank you for your offer. I have one of my first revision boards in my Solartron 7081 and I am not sure, if it is a good idea to open the meter and change the board. It is running for quite some time now and I compared it extensively with my Datron 1281. The noise performance of the Solartron 7081 is equal to the Datron 1281. This comparison is made with multiple ADR1399 references and an ADR1001 & AD5791 calibrator. It would be nice to have such a good and flawless pcb in my meter, but I am unsure if I want to disturb it.

[perdrix]

Please note that if you live in the USA, that customs fees have been introduced since January 20th 2025.    For the board and EPROM the charges and handling fees are GBP9.50.

I just had a buyer cancel his order because of that.

David

[DonBox]

Your effort is much appreciated.