SRS SR560 low noise preamp repair - unusual offset level symptom

[DaJMasta]

I've been working on this SR560 on and off for a bit and have now tested and replaced quite a few parts, but I've been getting basically the same symptoms for several replacements now, and I'm running out of places I can think of to check.

Basically, I'm running through the calibration procedure outlined in the service manual (available here: https://www.eevblog.com/forum/testgear/sr560-low-noise-voltage-preamplifier-schematics/ ), I can zero the frontend input, I can zero the low noise offset, but when I try to zero the low noise CMRR, if I actually get the oscillations not to be visible with DC coupling, there's a massive DC offset that wasn't there in the prior offset calibration.  I can turn the pot far enough to see the sine offset return, and if turned far enough, I can almost null the offset, of course with minimum CMRR and the opposite of the point of the adjustment.  I can put on the AC coupling and null the offset and it remains stable.  I also note that the overload seems to trigger under this condition at something around +4VDC out - if I null the CMRR and the offset is maxed, the overload is triggered, but if you press the button to reset it, the output drops to a level within the output range momentarily (longer than the button press, but not long), and then then maxes out and triggers the overload again.

I've replaced a good number of the amps and analog switches in the signal path, the frontend amplifiers, the multiplying DAC in the offset compensation section, and even pulled and measured several of the passives in the frontend which have all been fine.  I've also checked the overload path diodes to verify they're not shorted and checked the frontend relays to make sure they are making proper contact.  The amplification seems to be the correct amount, but even with the offset adjustment done, the output offset does change (even positive to negative) depending on the gain setting.

Basically, I thought it was the frontend, then I thought it was leakage or stuck on analog switches along the filter and preamp paths, then I thought it was the overload circuitry, then I thought it was the digital offset compensation.... and I've replaced and probed enough parts to be fairly sure it's none of that.  Do you have any idea of a section I should look at that I've so far overlooked?  Is there any way of checking to see the digital section is actually driving the right values to the multiplying DAC?  Is there a copy of the EEPROM available for me to just try another version of it to see if it's a software issue?  Just brainstorming possibilities could be helpful because at this point I feel like I've exhausted what I can think of and I'd really like to have it fixed and on the bench!

[Kleinstein]

The circuit looks quite complicated.  The front and has 2 stages: the FET input part with a gain switched by the relay and than a divider (1:2:5) and LT1028 based fixed x 10 stage.

One should be able to measure the signal at the output of the front end part (either the LT1028 or OP37). So it should become clear if the problem is more with the front end or the later parts.

Once an amplifier oscillates, it is not unusual to also get an offset shift. The oscillation amplitude is usually limited at one side and this shifts the offset. So the main point would be to fix the oscillation problem. It makes little sense to looks for offset as long as there is oscillation.

The circuit is a bit tricky and may heavily rely an a very stable 10  V supply. There is a chance the PSRR for the +10 V is horrible. Looking at the schematics I even think there may be a flaw in the design: it looks like the DC current level to the input stage is not set by the voltage from D101 (6.2 V zener), but the difference to the 10 V supply.

Have there been OPs in the front end (U102 or U103 been replaced). Especially the OP37 may not all behave exactly the same in a non standard use like here.