Not seeing anything unusual with a triangle wave signal from 1KHz to 100KHz with maximum memory depth. I attached a pic @ 100KHz. Not sure what you mean by "with a stride of 8"
Also not sure which is the offending channel...
Hey Jay,
this is mostly speculation, so take with a healthy grain of salt. This is also assuming the 784A is similar in architecture to the 544A, for which we have schematics on HÃ¥kan's site. There's also a decent description of the DEMUXes in the TDS520B component SM.
So, given these caveats, the acquisition system works as follows (apologies if this is old hat to you):
There are four ADCs, each of which I believe contains two separate flash converters. The ADCs have two byte-wide output channels. There's a DEMUX per ADC, these take the samples from the ADCs, decimate and buffer them until there's a "broadside" of eight samples ready to be written to acquisition memory.
Decimation modes in the DEMUX include normal (dropping samples) max/min/hires, so it could be a bit of an ordeal to test the DEMUX well. You'd effectively have to try all sampling rates in all acquisition modes :/.
I seem to remember that the normal decimation mode will favor one of the ADC "pipes" until the acquisition speed demands using both. The details are fuzzy and perhaps we didn't explore this thoroughly with the 520 with stuck ADC bits.
The bad samples in a stride eight would be where either the DEMUX internal logic or memory interface has problems, as the DEMUX internally buffers eight samples for a single write.
NB: if the 784A is shaped the same way the 544A, then demux "C" corresponds to channel 3. They go 1-A, 2-B, 3-C, 4-D.
Note, however that the acqusition board CAN acquire any of the channels with any of the ADCs, and at max acquisition speed with a single channel on, it interleaves all the ADCs to a single input. Maybe that's the easiest way to see whether you can provoke some visible acquisition-time trouble?
Also, in the 520B schematics, U200 is DMUX C - maybe the error message is giving you the suspect component designator?
The 520B service manual also talks about a "pixel processor", which interacts in some way with the sample memory through the DMUXen. If the 784A has anything like that, then that's another possibility - e.g. some sort of post-acquisition problem.
As you see, this is all so much speculation from poring over service manuals and schematic fragments - but I'd be curious to know whether/how you resolve this.
Siggi