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Electronics => Repair => Topic started by: pasta2018 on December 07, 2024, 09:41:19 am

Title: Tektronix DPO7104 repairs
Post by: pasta2018 on December 07, 2024, 09:41:19 am
 When the oscilloscope is turned on, there is a fan that does not turn. It has been confirmed that there is no problem with the fan. Checking the acquisition board, the measurement found that the input terminal of the U1750 (LT1963) was shorted to ground, and the measurement found that the two ends of the C1750 were also short-circuited. May I ask who has DPO7104, please measure whether these two ends of the normal instrument are short-circuited.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 07, 2024, 09:47:33 am
I removed the acquisition board and tested it again, and found that there was no short circuit. It seems that the short circuit before the test may be caused by the power interface board.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 07, 2024, 10:07:51 am
It's really interesting, and then disconnect the power interface board from the mother board, then I find that the mother board 3.3V is short-circuited with GND
Title: Re: Tektronix DPO7104 repairs
Post by: squadchannel on December 07, 2024, 10:14:38 am
Check again with the acq board alone and nothing connected.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 07, 2024, 10:55:24 am
Thanks，now I can confirm it's the mother board failure. 3.3V out is shorted to GND.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 07, 2024, 01:31:46 pm
it's the power supply CVR460-96p01b01,3.3V out is shorted.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 12, 2024, 08:29:25 am
Still not fixed. At present, the measured power supply voltage is normal, when I remove the acquisition board, both fans on the side of the oscilloscope rotate, but after the acquisition board is installed, only one fan rotates. Looking at the maintenance manual, it says that the acquaintion board will detect the temperature and then adjust the speed of the fan, who knows where the circuit for detecting and adjusting the fan is?
I saw that there is a place marked with sense on the acquisition board, it seems to be C100, and the two ends of the measurement are in a short-circuit state, I wonder if this is normal?
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 12, 2024, 09:39:09 pm
Quote from: pasta2018 on December 12, 2024, 08:29:25 am
I saw that there is a place marked with sense on the acquisition board, it seems to be C100, and the two ends of the measurement are in a short-circuit state, I wonder if this is normal?
I check resistance on work board this capacitor one side 0 Ohm to GND other side 8 Ohm to GND.

Update:
Little bit reverse engineering, FAN's connect to transistors Q632 and Q631 on main board (R632,R641,R631,R642=475 Ohm), next PWM signals go to acquisition board, on acquisition board PWM signals connect to U1305 its ADT7476 (bottom side), PWM1 connect to pin24 U1305, PWM2 connect to pin10 U1305.
I highly recommend when you do some tests, connect GOOD fan's for cool acquisition board (when i repair my scope i cool this board with 3 FAN's, two for ADC's one for NI BGA chip) and PSU-Motherboard. And be very careful with acquisition board try hard not bend this board (when you disconnect this), don't apply any force or litle hit to BGA heatsinks ADC, Preamp, DEMUX.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 13, 2024, 07:38:04 am
Really appropriate for your information, that's really useful. I will check the signals and be careful with acquisition board.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 14, 2024, 12:25:04 pm
I checked my scope, the power interface board is the same with yours. The acquisition board is different, pwm1 and pwm2 is shown in the picture,it is connect to pin 10 and pin24 of adt7476
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 14, 2024, 01:15:34 pm
I guess the Q631 or Q632 is fault.The two pin resistance of each one is not the same，while Q631 is about 2k，and Q632 is infinity.
It,s marked with 2A X，it's MMBT3906,a PNP transistor.
Title: Re: Tektronix DPO7104 repairs
Post by: coromonadalix on December 14, 2024, 02:17:41 pm
i would say  clean your pcb

it is crusty  and that could cause problems if it continues and humidity goes in that
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 14, 2024, 04:22:44 pm
I don't know what to clean well. I tried cleaning with water or alcohol and it didn't seem to work. It looks very clean when it gets wet, and it looks like this when it's dry.
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 14, 2024, 09:45:58 pm
Quote from: pasta2018 on December 14, 2024, 01:15:34 pm
I guess the Q631 or Q632 is fault.The two pin resistance of each one is not the same，while Q631 is about 2k，and Q632 is infinity.
It,s marked with 2A X，it's MMBT3906,a PNP transistor.
No, this is some N channel mosfet. Fan current 0,52A. You need some mosfet with similar parameter Vthreshold
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 14, 2024, 10:17:48 pm
Oh my god, thanks! Can you tell what is marked on Q631 of your scope? Mine is 2A XK8
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 14, 2024, 10:22:53 pm
Quote from: pasta2018 on December 14, 2024, 10:17:48 pm
Oh my god, thanks! Can you tell what is marked on Q631 of your scope? Mine is 2A XK8
2ax3A
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 15, 2024, 01:01:32 am
Thanks again.It may be SI2302ADS-T1-E3.
By the way, I saw you upgrade the 7104 to 7354 and generate an option key, have you successed?
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 15, 2024, 01:21:00 am
Quote from: pasta2018 on December 15, 2024, 01:01:32 am
Thanks again.It may be SI2302ADS-T1-E3.
By the way, I saw you upgrade the 7104 to 7354 and generate an option key, have you successed?
Yes i think this mosfet fine for this.
Upgrade DPO7104-DPO7354 possibly  only if scope have acqusition board with 4 ADC, 8DEMUX and track and hold ic, and in this moment SPC fail, i search someone who have DPO7254-DPO7354 for copy some files from it.
Your acquisition board have 2ADC 4DEMUX you can activate only some options and max memory, on this forum have links to keygen, or you can send me your sn and i generate key for you.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 15, 2024, 01:59:34 am
I get some information from the service manual,hope it's useful.
Can you post the keygen link here,I can not find it.
Title: Re: Tektronix DPO7104 repairs
Post by: calibrationfixture on December 15, 2024, 05:14:26 am
Hi pasta2018,

You need the Program(s):
- gen.py and
- validate.py

The last is used to split out the Option Mask for existing Keys.

Both can be found at:

https://0xacab.org/mitic/tek-ssc/tree/master

And a list of possible Options (page 2-9) for your DPO7104 attached.

Success,

Calibrationfixture

Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 15, 2024, 07:14:24 am
Thanks. I will learn it, hope I can fix my dpo7104 first
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 19, 2024, 09:56:39 am
It turned out that R632 was desoldered
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 19, 2024, 01:56:31 pm
Your scope work now? SPC pass?
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 19, 2024, 02:16:04 pm
Not yet.Now the two fans are running normally.
I uninstalled the tekscope before and am now reinstalling it, not sure if the acquisition board is still faulty.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 20, 2024, 05:37:36 am
Quite difficult.
When I install tekscope, it reports ddsigninstall32.exe error and then continue.

After installation, the tekscope start and then it report x08e error, then shutdown and restart.


Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 20, 2024, 11:00:56 am
With another DPO7054 operating system, I can now access the oscilloscope test interface. However, there are some errors, registers 224 and acquisition error
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 20, 2024, 03:19:34 pm
Download here your console.txt and diag.txt from C:\TekScope\calibration
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 20, 2024, 03:45:29 pm
it seems mainly point to U200,but I havn't find this chip on acquisition board.

Code: [Select]
Fri Dec 20 23:06:08 2024: DIAGNOSTIC EXECUTION starting ... Pu=2 T=-127C
Test "111" - Processor-->Memory-->DRAMWalk1 started
     Test execution time 2.7937e-006 sec
Test "112" - Processor-->Memory-->DRAMCell started
     Test execution time 0.025139 sec
Test "113" - Processor-->Memory-->DRAMMarch  started
     Test execution time 0.001479 sec
Test "114" - Processor-->Memory-->DRAMCal  started
     Test execution time 1.9556e-006 sec
Test "211" - Registers-->PCI-->MIA started
     Test execution time 0.0001422 sec
Test "221" - Registers-->Acquisition-->ACL started
     Test execution time 0.00068221 sec
Test "222" - Registers-->Acquisition-->PLL started
     Test execution time 0.02519 sec
Test "223" - Registers-->Acquisition-->Preamp started
     Test execution time 0.31132 sec
Test "224" - Registers-->Acquisition-->TrkHld started

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x1/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0xfe/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x2/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0xfd/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x4/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0xfb/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x8/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0xf7/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x10/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0xef/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x20/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0xdf/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x40/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0xbf/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x80/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x7f/0x0

		DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x1fe/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x1fd/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x1fb/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x1f7/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x1ef/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x1df/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x1bf/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x17f/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x100/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x000 exp/act 0x1ff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x1/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x1fe/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x2/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x1fd/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x4/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x1fb/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x8/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x1f7/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x10/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x1ef/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x20/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x1df/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x40/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x1bf/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x80/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x17f/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x100/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0xff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x001 exp/act 0x1ff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x1/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x1fe/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x2/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x1fd/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x4/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x1fb/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x8/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x1f7/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x10/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x1ef/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x20/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x1df/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x40/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x1bf/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x80/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x17f/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x100/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0xff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x002 exp/act 0x1ff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x1/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x1fe/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x2/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x1fd/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x4/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x1fb/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x8/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x1f7/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x10/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x1ef/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x20/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x1df/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x40/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x1bf/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x80/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x17f/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x100/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0xff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ+0x003 exp/act 0x1ff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x1fe/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x1fd/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x1fb/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x1f7/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x1ef/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x1df/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x1bf/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x17f/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x100/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x11) - U200(HFD201[0])/HFADJ_A+0x000 exp/act 0x1ff/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x1fe/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x1fd/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x1fb/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x1f7/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x1ef/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x1df/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x1bf/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x17f/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x100/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x12) - U200(HFD201[0])/HFADJ_B+0x000 exp/act 0x1ff/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x1fe/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x1fd/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x1fb/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x1f7/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x1ef/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x1df/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x1bf/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x17f/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x100/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x13) - U200(HFD201[0])/HFADJ_C+0x000 exp/act 0x1ff/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x1fe/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x1fd/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x1fb/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x1f7/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x1ef/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x1df/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x1bf/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x17f/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x100/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x14) - U200(HFD201[0])/HFADJ_D+0x000 exp/act 0x1ff/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_A+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_A+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_A+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_B+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_B+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_B+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_C+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_C+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_C+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_D+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_D+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/IN_MUX_SELECT_D+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/LP_SEL_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/LP_SEL_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/LP_SEL_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/LP_SEL_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/LP_SEL_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/LP_SEL_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/LP_SEL_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/LP_SEL_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x3fe/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x3fd/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x3fb/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x3f7/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x3ef/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x3df/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x3bf/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x37f/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x100/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x2ff/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x200/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x1ff/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL+0x000 exp/act 0x3ff/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DEBUG+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DEBUG+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DEC+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DEC+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DEC+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DEC+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DEC+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DIV+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DIV+0x000 exp/act 0xe/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DIV+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DIV+0x000 exp/act 0xd/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DIV+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DIV+0x000 exp/act 0xb/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DIV+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DIV+0x000 exp/act 0x7/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_DIV+0x000 exp/act 0xf/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_EN+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_EN+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_SEL+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_SEL+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_SEL+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_SEL+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x71) - U200(HFD201[0])/SD_ADC_CTRL_SEL+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xffe/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xffd/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xffb/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xff7/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xfef/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xfdf/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xfbf/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xf7f/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x100/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xeff/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x200/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xdff/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x400/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xbff/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x800/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0x7ff/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SIG_MUX_SELECT+0x000 exp/act 0xfff/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SMP_MUX_SELECT_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SMP_MUX_SELECT_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SMP_MUX_SELECT_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SMP_MUX_SELECT_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SMP_MUX_SELECT_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SMP_MUX_SELECT_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SMP_MUX_SELECT_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x00) - U200(HFD201[0])/SMP_MUX_SELECT_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x34) - U200(HFD201[0])/SPARE_1+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x35) - U200(HFD201[0])/SPARE_2+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x36) - U200(HFD201[0])/SPARE_3+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x37) - U200(HFD201[0])/SPARE_4+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x38) - U200(HFD201[0])/SPARE_5+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x32) - U200(HFD201[0])/SYNTH_FILT_DAC+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xffe/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xffd/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xffb/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xff7/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xfef/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xfdf/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xfbf/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xf7f/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x100/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xeff/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x200/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xdff/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x400/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xbff/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x800/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0x7ff/0x0

		Wlk1HWMismatch (0x31) - U200(HFD201[0])/SYNTH_TUNE_DAC+0x000 exp/act 0xfff/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x7fe/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x7fd/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x7fb/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x7f7/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x7ef/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x7df/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x7bf/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x77f/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x100/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x6ff/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x200/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x5ff/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x400/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x3ff/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL+0x000 exp/act 0x7ff/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL_BLOCK+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL_BLOCK+0x000 exp/act 0x6/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL_BLOCK+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL_BLOCK+0x000 exp/act 0x5/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL_BLOCK+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL_BLOCK+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x70) - U200(HFD201[0])/TEST_BUS_SEL_BLOCK+0x000 exp/act 0x7/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x21) - U200(HFD201[0])/TEST_SIG_DAC_A+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x22) - U200(HFD201[0])/TEST_SIG_DAC_B+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x23) - U200(HFD201[0])/TEST_SIG_DAC_C+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x24) - U200(HFD201[0])/TEST_SIG_DAC_D+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0xfe/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0xfd/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0xfb/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0xf7/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0xef/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0x20/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0xdf/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0x40/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0xbf/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0x80/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0x7f/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SELECT+0x000 exp/act 0xff/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_A+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_A+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_A+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_A+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_B+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_B+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_B+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_B+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_C+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_C+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_C+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_C+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_D+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_D+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_D+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x20) - U200(HFD201[0])/TEST_SIG_SEL_D+0x000 exp/act 0x3/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x1e/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x2/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x1d/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x4/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x1b/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x8/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x17/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x10/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0xf/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/TH_CONTROL+0x000 exp/act 0x1f/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/ZMUX_DISABLE+0x000 exp/act 0x1/0x0

		Wlk1HWMismatch (0x10) - U200(HFD201[0])/ZMUX_DISABLE+0x000 exp/act 0x1/0x0
       *** TEST FAILED ***
     Test execution time 0.21408 sec
diagMgr:diagLogFailure: Fri Dec 20 23:06:08 2024 D Pu=2 T=-127 "DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x1/0x0"
Test "225" - Registers-->Acquisition-->ADC started
     Test execution time 0.010165 sec
Test "226" - Registers-->Acquisition-->DAC started
     Test execution time 0.42803 sec
Test "227" - Registers-->Acquisition-->Demux started
     Test execution time 0.0046355 sec
Test "231" - Registers-->Trigger-->SBTL started
     Test execution time 8.6603e-005 sec
Test "232" - Registers-->Trigger-->SGTL started
     Test execution time 0.01268 sec
Test "233" - Registers-->Trigger-->TrigComp started
     Test execution time 0.011714 sec
Test "234" - Registers-->Trigger-->CommTrig started
     Test execution time 0.57148 sec
Test "241" - Registers-->Misc-->FanCtrl started
     Test execution time 0.43045 sec
Test "311" - Acquisition-->Demux-->RunAB started
     Test execution time 0.21265 sec
Test "312" - Acquisition-->Demux-->AcqDone started
     Test execution time 0.00092665 sec
Test "313" - Acquisition-->Demux-->SysRdy started
     Test execution time 0.00055677 sec
Test "314" - Acquisition-->Demux-->Interrupt started
     Test execution time 0.0010096 sec
Test "315" - Acquisition-->Demux-->IdcLoSpeed started
     Test execution time 0.0032996 sec
Test "316" - Acquisition-->Demux-->IdcHiSpeed started
     Test execution time 0.11145 sec
Test "317" - Acquisition-->Demux-->IdcAcqDataXfr started
     Test execution time 0.002733 sec
Test "318" - Acquisition-->Demux-->IdcDispDataXfr started
     Test execution time 0.0027344 sec
Test "321" - Acquisition-->Dma-->PaDma started
     Test execution time 0.0024484 sec
Test "322" - Acquisition-->Dma-->IdcAcqDma started
     Test execution time 0.0031037 sec
Test "331" - Acquisition-->Memory-->MemData started
     Test execution time 0.010492 sec
Test "332" - Acquisition-->Memory-->MemAddr started
     Test execution time 0.0019681 sec
Test "333" - Acquisition-->Memory-->MemSpeed started
     Test execution time 11.094 sec
Test "341" - Acquisition-->Vertical-->Preamp Inputs started
       *** TEST N/A FOR THIS HW ***
     Test execution time 1.9556e-006 sec
Test "342" - Acquisition-->Vertical-->TH Inputs started
U200(HFD201[0]) input IN_A failed at high/low input level (ref:0000 hi:0000 lo:0000 mar:10000)
U200(HFD201[0]) input IN_B failed at high/low input level (ref:0000 hi:0000 lo:0000 mar:10000)
U200(HFD201[0]) input IN_C failed at high/low input level (ref:0000 hi:0000 lo:0000 mar:10000)
U200(HFD201[0]) input IN_D failed at high/low input level (ref:0000 hi:0000 lo:0000 mar:10000)
       *** TEST FAILED ***
     Test execution time 0.30627 sec
diagMgr:diagLogFailure: Fri Dec 20 23:06:08 2024 D Pu=2 T=-127 "U200(HFD201[0]) input IN_A failed at high/low input level (ref:0000 hi:0000 lo:0000 mar:10000)"
Test "343" - Acquisition-->Vertical-->ADC Inputs started
U10_A(HFD204[0]) input IN2 failed at low input level (ref:813b18 hi:813c4f lo:813ba4 mar:0100)
       *** TEST FAILED ***
     Test execution time 0.75759 sec
diagMgr:diagLogFailure: Fri Dec 20 23:06:08 2024 D Pu=2 T=-127 "U10_A(HFD204[0]) input IN2 failed at low input level (ref:813b18 hi:813c4f lo:813ba4 mar:0100)"
Test "344" - Acquisition-->Vertical-->ADC Outputs started
     Test execution time 0.23422 sec
Test "345" - Acquisition-->Vertical-->50ohmOvld started
     Test execution time 1.0732 sec
Test "346" - Acquisition-->Vertical-->LFComp started
     Test execution time 0.83658 sec
Test "351" - Acquisition-->PLL-->Clock Freq started
     Test execution time 0.67067 sec
Test "361" - Acquisition-->HFSource-->SINE started
HFSource:SINE:INTLV_CAL_VCO_N CH1 failed, amplitude too low (Act delta:1.386e-001; hi:-1.980e-001 lo:-3.366e-001; Exp Delta min:1.720e-001)
       *** TEST FAILED ***
     Test execution time 0.049042 sec
diagMgr:diagLogFailure: Fri Dec 20 23:06:08 2024 D Pu=2 T=-127 "HFSource:SINE:INTLV_CAL_VCO_N CH1 failed, amplitude too low (Act delta:1.386e-001; hi:-1.980e-001 lo:-3.366e-001; Exp Delta min:1.720e-001)"
Test "362" - Acquisition-->HFSource-->SINE33 started
HFSource:SINE33:ACQ_PHASE_CAL_CLK CH1 failed, amplitude too low (Act delta:1.426e-001; hi:-2.099e-001 lo:-3.524e-001; Exp Delta min:2.680e-001)
       *** TEST FAILED ***
     Test execution time 0.049997 sec
diagMgr:diagLogFailure: Fri Dec 20 23:06:08 2024 D Pu=2 T=-127 "HFSource:SINE33:ACQ_PHASE_CAL_CLK CH1 failed, amplitude too low (Act delta:1.426e-001; hi:-2.099e-001 lo:-3.524e-001; Exp Delta min:2.680e-001)"
Test "363" - Acquisition-->HFSource-->SQUARE started
HFSource:SQUARE:HF_LF_CAL_STEP CH1 failed, amplitude too low (Act delta:3.980e-002; hi:-4.219e-001 lo:-4.617e-001; Exp Delta min:4.340e-001)
       *** TEST FAILED ***
     Test execution time 0.05094 sec
diagMgr:diagLogFailure: Fri Dec 20 23:06:08 2024 D Pu=2 T=-127 "HFSource:SQUARE:HF_LF_CAL_STEP CH1 failed, amplitude too low (Act delta:3.980e-002; hi:-4.219e-001 lo:-4.617e-001; Exp Delta min:4.340e-001)"
Test "371" - Acquisition-->AcqProcessor-->SPI started
     Test execution time 0.0001651 sec
Test "372" - Acquisition-->AcqProcessor-->INT Line started
     Test execution time 0.00062606 sec
Test "373" - Acquisition-->AcqProcessor-->Interrupt started
     Test execution time 0.00048917 sec
Test "374" - Acquisition-->AcqProcessor-->RelayDrive started
       *** TEST N/A FOR THIS HW ***
     Test execution time 1.9556e-006 sec
Test "375" - Acquisition-->AcqProcessor-->TWI started
     Test execution time 0.00014248 sec
Test "376" - Acquisition-->AcqProcessor-->PrbInterrupts started
     Test execution time 0.00036709 sec
Test "377" - Acquisition-->AcqProcessor-->TCpowerCtrl started
       *** TEST N/A FOR THIS HW ***
     Test execution time 1.6762e-006 sec
Test "378" - Acquisition-->AcqProcessor-->MAX517 started
     Test execution time 0.00096716 sec
Test "411" - Trigger-->Inputs-->Ch1 started
     Test execution time 0.10322 sec
Test "412" - Trigger-->Inputs-->Ch2 started
     Test execution time 0.11976 sec
Test "413" - Trigger-->Inputs-->Ch3 started
     Test execution time 0.11968 sec
Test "414" - Trigger-->Inputs-->Ch4 started
     Test execution time 0.11995 sec
Test "415" - Trigger-->Inputs-->Line started
     Test execution time 0.016928 sec
Test "416" - Trigger-->Inputs-->Video started
     Test execution time 0.18757 sec
Test "417" - Trigger-->Inputs-->Events started
     Test execution time 0.20396 sec
Test "418" - Trigger-->Inputs-->Serial started
     Test execution time 0.30997 sec
Test "421" - Trigger-->Outputs-->523TrgOut started
     Test execution time 0.00072942 sec
Test "422" - Trigger-->Outputs-->523CpuInt started
     Test execution time 0.00052046 sec
Test "423" - Trigger-->Outputs-->Fedge started
     Test execution time 0.040204 sec
Test "424" - Trigger-->Outputs-->Ftrig started
     Test execution time 0.03961 sec
Test "425" - Trigger-->Outputs-->TrigInfo started
     Test execution time 0.47688 sec
Test "431" - Trigger-->Timers-->Delay started
     Test execution time 0.096932 sec
Test "432" - Trigger-->Timers-->Delta started
     Test execution time 0.047023 sec
Test "433" - Trigger-->Timers-->Holdoff started
     Test execution time 0.10354 sec
Test "434" - Trigger-->Timers-->PostTrig started
     Test execution time 0.15703 sec
Test "435" - Trigger-->Timers-->PreTrig started
     Test execution time 0.057601 sec
Test "436" - Trigger-->Timers-->Timeout started
     Test execution time 0.04074 sec
Test "511" - TekLink-->Topology -->Signals started
 -- The instrument does not have a physical connection to teklink network.
       *** TEST N/A FOR THIS HW ***
     Test execution time 0.00010169 sec
Test "521" - TekLink-->Trigger -->Path started
 -- The instrument does not have a physical connection to teklink network.
       *** TEST N/A FOR THIS HW ***
     Test execution time 0.00010029 sec
Test "531" - TekLink-->Reference -->Path started
 -- The instrument does not have a physical connection to teklink network.
       *** TEST N/A FOR THIS HW ***
     Test execution time 9.9733e-005 sec
Fri Dec 20 23:06:28 2024: DIAG MODE DIAGNOSTICS RESULTS: 6 (of 70) tests SKIPPED
Fri Dec 20 23:06:28 2024: DIAG MODE DIAGNOSTICS RESULTS: 6 (of 64) EXECUTED tests FAILED
Test 224 - F ==> Registers->Acquisition->TrkHld, 0.21408 sec
	DataLineTstStepFail- U200(HFD201[0])/SPARE_0+0x000 exp/act 0x1/0x0
Test 342 - F ==> Acquisition->Vertical->TH Inputs, 0.30627 sec
	U200(HFD201[0]) input IN_A failed at high/low input level (ref:0000 hi:0000 lo:0000 mar:10000)
Test 343 - F ==> Acquisition->Vertical->ADC Inputs, 0.75759 sec
	U10_A(HFD204[0]) input IN2 failed at low input level (ref:813b18 hi:813c4f lo:813ba4 mar:0100)
Test 361 - F ==> Acquisition->HFSource->SINE, 0.049042 sec
	HFSource:SINE:INTLV_CAL_VCO_N CH1 failed, amplitude too low (Act delta:1.386e-001; hi:-1.980e-001 lo:-3.366e-001; Exp Delta min:1.720e-001)
Test 362 - F ==> Acquisition->HFSource->SINE33, 0.049997 sec
	HFSource:SINE33:ACQ_PHASE_CAL_CLK CH1 failed, amplitude too low (Act delta:1.426e-001; hi:-2.099e-001 lo:-3.524e-001; Exp Delta min:2.680e-001)
Test 363 - F ==> Acquisition->HFSource->SQUARE, 0.05094 sec
	HFSource:SQUARE:HF_LF_CAL_STEP CH1 failed, amplitude too low (Act delta:3.980e-002; hi:-4.219e-001 lo:-4.617e-001; Exp Delta min:4.340e-001)
DIAGNOSTIC EXECUTION finished in 19.985 sec
DRAM is Mt_ddr2_512M_667

Dram Calibration results:
-------------------------
DramCal has PASSED on all Demuxs

 -- The instrument does not have a physical connection to teklink network.
pipe 0:4 buf[0]:-128, buf[end]:-1, cross 17983
pipe 0:5 buf[0]:-128, buf[end]:-5, cross 25000
pipe 0:6 buf[0]:-128, buf[end]:-11, cross 25000
pipe 0:7 buf[0]:-128, buf[end]:-11, cross 25000
pipe 0:4 buf[0]:-128, buf[end]:-1, cross 19840
pipe 0:5 buf[0]:-128, buf[end]:-6, cross 25000
pipe 0:6 buf[0]:-128, buf[end]:-11, cross 25000
pipe 0:7 buf[0]:-128, buf[end]:-13, cross 25000
pipe 0:5 buf[0]:-128, buf[end]:-5, cross 25000
pipe 0:6 buf[0]:-128, buf[end]:-11, cross 25000
pipe 0:7 buf[0]:-128, buf[end]:-14, cross 25000
pipe 0:4 buf[0]:-128, buf[end]:-1, cross 14286
pipe 0:5 buf[0]:-128, buf[end]:-6, cross 25000
pipe 0:6 buf[0]:-128, buf[end]:-11, cross 25000
pipe 0:7 buf[0]:-128, buf[end]:-14, cross 25000
can't get a good crossing
Bad cross measurement
Phase cal pass 2
dmx 0 took 32 iterations 
dmx 1 took 32 iterations 
dmx 2 took 32 iterations 
dmx 3 took 32 iterations 
pipe 0:4 buf[0]:-128, buf[end]:-2, cross 7413
pipe 0:5 buf[0]:-128, buf[end]:-7, cross 25000
pipe 0:6 buf[0]:-128, buf[end]:-12, cross 25000
pipe 0:7 buf[0]:-128, buf[end]:-13, cross 25000
pipe 0:5 buf[0]:-128, buf[end]:-6, cross 25000
pipe 0:6 buf[0]:-128, buf[end]:-12, cross 25000
pipe 0:7 buf[0]:-128, buf[end]:-12, cross 25000
pipe 0:5 buf[0]:-128, buf[end]:-5, cross 25000
pipe 0:6 buf[0]:-128, buf[end]:-11, cross 25000
pipe 0:7 buf[0]:-128, buf[end]:-13, cross 25000
can't get a good crossing
initial cross   111 chip:quad 0:0
initial cross   107 chip:quad 0:1
initial cross   113 chip:quad 0:2
initial cross   108 chip:quad 0:3
initial cross   118 chip:quad 1:0
initial cross 23873 chip:quad 1:1
Bad cross measurement
Phase cal pass 3
dmx 0 took 32 iterations 
dmx 1 took 32 iterations 
dmx 2 took 32 iterations 
dmx 3 took 32 iterations 
can't get a good crossing
initial cross   111 chip:quad 0:0
initial cross   107 chip:quad 0:1
initial cross   114 chip:quad 0:2
initial cross   108 chip:quad 0:3
initial cross   142 chip:quad 1:0
initial cross 23873 chip:quad 1:1
Bad cross measurement
Phase cal pass 4
dmx 0 took 32 iterations 
dmx 1 took 32 iterations 
dmx 2 took 32 iterations 
dmx 3 took 32 iterations 
can't get a good crossing
initial cross   111 chip:quad 0:0
initial cross   107 chip:quad 0:1
initial cross   113 chip:quad 0:2
initial cross   108 chip:quad 0:3
initial cross   118 chip:quad 1:0
initial cross 23873 chip:quad 1:1
Bad cross measurement

ERROR (0xffffffff): digPhaseCal failed
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 20, 2024, 06:56:19 pm
Downlod here console.txt file.
On previous photo i see your acqusition board without track and hold ic (its U200), look like tekscope program trying get access to u200.
Try delete callibration file C:\TekScope\calibration   >calSPCConst.dat< then restart scope
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 21, 2024, 01:06:56 am
Hi iAleks，thanks for your advise.I delete calibration file and restart,the errors didn's change.
I upload the console.txt file here.
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 21, 2024, 06:20:05 am
Your acqusition board looks like this? right?
My board log
Code: [Select]
------- VERSION INFO -------
"5.3.5 Build 22"
  RTL version
     Expected = "5.3.5.22"
     Actual   = "5.3.5.22"
  UI version
     Expected = "5.3.5.22"
     Actual   = "Unknown - UI not Started"
----------------------------

================================================================
SYSTEM INFORMATION:
    Stingray
    Model: DPO7104
    Serial number: C010424
    Scope.exe Version: 5.3.5 Build 22;     RELEASE
    Diagnostics:
        Powerup mode: USER
        Powerups Count: 74
    Timed Demo Info: Timed Demo, 0 days left.
    Options: 
        ASM: Advanced Search & Mark
        LT: Limit Test
        App 75 Avail
         not installed.
        
    Hardware Configuration:
        CPU Board Id: 1, 1
        Windows Driver version: 1021D
        MIA Image version: 10011156
        ACL4 Image version: AC140707
        Number of channels: 4
        Acq board RevA
        DEMUXES PRESENT: 4 DEMUXES IN USE: 4
        ATODS PRESENT: 2 ATODS IN USE: 2
        Track and Holds: 0
        ACQ MEM: 268435456
        ACQ BW: 1000
        ACQ SAMPLE RATE: 5000
        DEMUX ASIC REV: 0
        FTL PRESENT: 0
            Max Recovd Clk:      1.25e+009
            CalFilter support:   0
            BWE Support:         1
            CF StandardBits:     0x00000000
            BWE Bandwidth:       1.000e+009
            BWE SampleRate:      5.000e+009
            IsVista:             0
================================================================
    system configuration flags
     PREAMP HFD144
     PREAMP M668
     50 ohm termination
     1 meg ohm termination
     Attenuator 10x
     Advanced Search
     Limit Test
     Trigger Video

        Track and Holds: 0
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 21, 2024, 07:36:23 am
yes.My acquisition board is the same with this one
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 21, 2024, 04:22:24 pm
Im not shure were problem, check this resistors. Then i prepare HDD image for recovery.
And i dont like this string from your console file
Fri Dec 20 23:06:08 2024: DIAGNOSTIC EXECUTION starting ... Pu=2 T=-127C
Maybe this couse board have somewhere bad configuration, this explains the negative temperature value and the attempt to U200.

Can you take good photo your board? Two side of pcb.
Title: Re: Tektronix DPO7104 repairs
Post by: coromonadalix on December 21, 2024, 05:58:16 pm
on some acq of other models  you have to rewrite some eeprom,  i forgetting for what code ...    but it cleared some errors, you have to go  in the big tds7k thread



here's some others,  for the given scripts i need to restart a computer to get them,  the eeprom rewrite .....   not sure all related,  but  yes  the other thread answer  seems to point to something who get very hot


https://www.eevblog.com/forum/testgear/tektronix-tds6000b7000b-series-nvram-dump-script/ (https://www.eevblog.com/forum/testgear/tektronix-tds6000b7000b-series-nvram-dump-script/)

https://www.eevblog.com/forum/testgear/tektronix-tds8000-backup-calibration-parameters/msg5755891/#msg5755891 (https://www.eevblog.com/forum/testgear/tektronix-tds8000-backup-calibration-parameters/msg5755891/#msg5755891)
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 22, 2024, 12:55:16 am
After I downloaded the latest firmware from the Tektronix official website and reinstalled it, the oscilloscope would have a blue screen when I booted up TekScope.
The backup dpo7054 system can be started normally with a backup and will not be blue screen.
Pay attention to my console log, there is also an H10-A error that causes acquisition 361 etc. When I was measuring, I found that the vertical position of channel 2 can be adjusted, while the vertical position of other channels is not adjustable, and it will closely follow the baseline of channel 2.
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 22, 2024, 01:48:07 am
About software, try this link (https://mega.nz/file/zZsyCZhT#3xuGIUih55B9yO93KxN1bZ8KSCF8IMa5ot2JkSbsWmc), this hdd image created with Macrium Reflect.
And check resistors from my previous message, this resistors for board configuration.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 22, 2024, 04:21:36 am
Thanks for the backup. Unlucky I can not download the file for some net reason in the country.
I will take time to  check the resistence first as yesterday I have packed the scope.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 22, 2024, 04:59:06 am
The four resistance value is the same with yours.Attached is my acquisition board.
Title: Re: Tektronix DPO7104 repairs
Post by: iAleks on December 22, 2024, 11:51:37 pm
What file sharing services you have access? I have Wechat, maybe I can send you a file through it? Image size 6GB
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 23, 2024, 12:15:30 am
I will try VPN to access the link.
I'm glad to add your WeChat.My account is threemor
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 23, 2024, 01:31:28 pm
I'm glad to report, with iAleks HDD image, my scope is fixed. There is no error now.
Thanks again for all the help.
Title: Re: Tektronix DPO7104 repairs
Post by: pasta2018 on December 23, 2024, 01:49:43 pm
Since I used the DPO7054 oscilloscope system to recover my oscilloscope, and the DPO7054 oscilloscope acquisition board has U200, my DPO7104 does not have this chip, which leads to errors in self-test. The correct DPO7104 system is now used and the machine is normal.
SPC is also pass.