The repair from He!! - HP 4275A LCR meter

[precaud]

"Sometimes you eat the bear and sometimes the bear eats you". This one has definitely been a bear, and so far, it is eating me.

It may take a few posts to set the table on this one, so pls be patient.

Several years ago I got two 4275A's at auction. No way to test before buying. My luck, they both had issues. This one booted but my notes say it had issues on the A2 board. The other one didn't boot. So I stole the cpu card from this one, which made the other one a working machine, which I sold shortly thereafter, and set this one aside for a rainy day. A few years pass... I "find" this one sitting in a storage room, and I sure would like to get it working. A good 10MHz LCR meter would be a nice thing to have.

An internet search revealed several posts describing the frequent occurrence of "mask ROM rot" in this and its 4274A sibling. The symptoms described were the same as mine. One poster said the second ROM (U3) was where the boot code resided so try replacing it first. An image of supposedly good ROMs is posted in the files section of the Yahoo Agilent group. A message to the person that posted them went unanswered.

Another piece of interesting info gleaned from other posts is that the 4275A shares many components with the 4274A. The cpu board (A9) and memory boards (A8) are supposedly identical. Even the ROM code. Examining the service manuals seems to support that; the part number for the 4275A ROMs begins with "04274A-". I have an early non-working 4274A here, so I can check that out.

Unplugged the GPIB card and its U10 ROM to simplify the setup, powered up this 4275A, and the display is dead. Nada. I then swapped the 4274A cpu card in, and voila, it boots, passes ROM and RAM POST tests (the five P's it displays) and looks like it is trying to make measurements but returns every time with error 4 (with or without a test fixture installed).

So I unsoldered the U3 mask ROM, installed a socket, burned a 2764A EPROM from the image file, and compared it to the mask ROM. No difference. That nixes the idea that U3 has the boot code.

From the factory, the firmware on some boards came on mask ROMs, and others on EPROMS. There are jumpers on the cpu board to set it up for one or the other (not a mix; has to be all one or the other). So there is no good way to replace just one ROM with an EPROM. So I unsoldered the rest of the ROMs and installed sockets taken from surplus pcbs. The desoldering gun got a good workout. Burned the full set of EPROMs from the image file and compared them to the old ROMs. There was one byte different on U1. U3, U5, U7 were the same. U10 had hundreds of different bytes. Supposedly that is for the GPIB option. But it is not installed right now so that is not stopping it from booting. Could one "bad" byte on U1 be locking up the machine? The only way to know is install the EPROMS and change the jumpers for them.

Did so, but no difference. Still dead.

I swapped the MC6800 cpu from the 75A board into the 74A board and it worked fine. So we know the cpu is good.

The service manual has a troubleshooting section on interpreting the five P's displayed at power up, and which ROM (or RAM) is bad if it halts there. It says if no P is displayed, then U10 is bad. So I plugged in the U10 EPROM and the GPIB card and restarted. Nada. No difference.

It is now maddeningly clear that both the manual and anecdotal info on this machine are riddled with inaccuracies.

Here is a photo of the machine with the 4274A cpu board in it. Looks normal, eh? Second installment follows.

[precaud]

OK, the manual is giving wrong info about POST so I started looking at signals on the cpu card. Clocks and supply voltages were good, everything else hung either high or low; no activity. The manual troubleshooting procedures assume you have an HP 5004A Signature Analyzer, which I do not have. Knowing the cpu is good, I started replacing chips which *should* have output to the test points. This is one of those moments when hoarding 74LS chips for all these years came in very handy. And sure enough signals started to appear. Activity on the address bus after replacing those buffers. Then the data bus transceivers (though their falling edge looked messy). This went on for the better part of two days by which time I had replaced all but four chips on the board. Some kind of cascade failure had occurred on this thing. By now a couple dots showed in the displays at powerup, but still no boot.

At this point I stopped to study the digital systems memory map, cpu opcodes, and ROM files, looking for more clues. When the 6800 wakes up, it reads a 16 bit pointer from the very top of the 64kB memory space (locations FFFE and FFFF), which has to contain the address of the Reset routine. Low and behold, that address is F815, which is in ROM 1 (U1) address space, and not U3. So let's look at what the machine does on boot. I did a quick "hand disassembly" of the boot area of ROM 1.

Code: [Select]

--------------------------
HP 4275A boot code

Boot Address (from Reset vector @ FFFE) : F815  (on ROM 1)

F815:	JMP	F876
 :
 : some more JMP's and code...
 :
Reset:                       ; startup routine (on powerup or when reset line pulled low)
F876:	LDS        03FF	; Set stack pointer 1/4 way into SRAM addr space
	LDA A	0FFF	; get the last bye of SRAM into accumulator A
	CMP A	FF	; if all bits high, SRAM is defective or not installed,
	BEQ	F3	        ;   branch if == (-115 bytes relative) to abort
	LDA B	FC    ;  otherwise continue
	STA B 	800B	; initialize something on A7 board ( peripheral control =  8xxx address space)
	LDA B	F4
	STA B 	8009	; and another
	CLR   	016C  ; zero a byte in SRAM
	CLR   	016D	; another
	CLR   	016E	;  "
	CLR   	016F	;  "
	CLR   	0181	;  "
	                        ;  ... it does this a few more times ...
Loop:	CLR   	0189	;  last one
	LDA A	01B7	; load byte at 01B7 into A (startup set it to zero...)
F8C0:	NOP   		;  Why NOP? It works around a bug in pre- Nov '77 6800's before setting or clearing interrupts.
	EOR A	B6	;  Exclusive OR A with 10110110
 	SEI    		; set interrupt mask (disable interrupts)
	STX   	81FE	; store index register to something on A7 board (peripheral control)
	BEQ	26     	;  branch if == zero +38 bytes rel.
	CMP A	FD    ;  a bunch of compares follows
	BEQ	40     	;  branch if == +64 bytes rel.
	CMP A	FC
	BEQ	50     	;  branch if == +80 bytes rel.
	CMP A	FB
	BEQ	15     	;  branch if == +23 bytes rel.
	CMP A	FA
	BEQ	0A     	;  branch if == +10 bytes rel.
	CMP A	F9
	BEQ	09     	;  branch if == +9 bytes rel.
	CMP A	F8
	BEQ	08     	;  branch if == +8 bytes rel.
	BRA	A7     	;  otherwise an unconditional jump -39 bytes (to Loop)
	.
	.
	.
------------------------

And we see here a bunch of housekeeping code that makes sense for what should happen at bootup.
It first sets the stack pointer into the static RAM address space.
Then it reads the last byte of the SRAM to see if the chip is absent, or defective, and aborts if so.

And there is our first clue. The first thing tested is the SRAM. If no "P" appears, it means the SRAM is bad, not U10 like the manual says. And that makes logical sense; if it has no ram to work with, it can't continue.

You have to wonder, did they print that by mistake, or is it intentionally misleading? Why? Because U10 is an OPTION ROM !!  Many 74A and 75A's don't have it.

Anyway, I need to check the SRAM chips.

The pic below shows the cpu card with most of the IC's that were replaced. Third installment follows.

[precaud]

So I need to test the SRAM chips. Since the 4274A board passes POST, it's SRAM chips must be good. I removed the 2114s from both boards, installed sockets, and swapped 2114's one at a time onto the 4274A board. One of them was bad. Pulled some 2114's from a Keithley 192 carcass I had laying around, tested them, they were both good, so cleaned and installed them into the 75A board. And now it boots with more activity. A Letter appears in the 2nd display, and a P in the third.  See pic below, showing the cpu on extender boards. First evidence that it is really trying to boot.

So it is starting the POST but not completing it. Some signals at the test points now more closely resemble those of the 74A board, though one is missing. Press a front panel key, and the INT line goes low (as it should). So the hardware part of the interrupt system is working. After a reset, I see a few hits on the U1 Rom select line, which suggests it is executing at least some of the startup code there, as it should. But it never completes the POST.

And this is where I'm stuck. Something is hanging the cpu after it begins the POST routine.

I have a logic analyzer (HP 1631D) but have never used it. And the manual doesn't give timing diagrams for the digital boards.

I welcome any and all input, suggestions, observations, theories, commiserations, comments. The way I see it, after replacing all the chips, the thing should at least boot. Unless one or more of the chips I installed was bad...

[Tomorokoshi]

Comments:

1. I don't have any equipment of that series, but I do have equipment from both before and after it.

2. With multiple chip failures check the power supply. Is it going over-voltage when turned on? Turned off?

3. A lot of HP LCR equipment seems to come out of HP Yokogawa in Japan. It's possible that the manuals were originally composed in Japanese and then translated. This may account for some of the errors, although overall I've found HP Yokogawa manuals to be very good.

4. HP LCR equipment also seems to usually have that one unobtainium part that's plated with impossibilimite. Although, in this case it seems to be related to general logic.

5. For manuals are you using the rough scans from Keysight? Artek has scans, although I didn't need to get that set.

6. Did you check the "Manual Changes" section of 04275-90012? More changes than most others I've seen.

[precaud]

Comments:
1. I don't have any equipment of that series, but I do have equipment from both before and after it.

Thanks for your input!

2. With multiple chip failures check the power supply. Is it going over-voltage when turned on? Turned off?

Good idea, I'll check it. Though it has to be said, the failures to this board happened when it was installed in a different 4275A...

3. A lot of HP LCR equipment seems to come out of HP Yokogawa in Japan. It's possible that the manuals were originally composed in Japanese and then translated. This may account for some of the errors, although overall I've found HP Yokogawa manuals to be very good.

Very good point.

5. For manuals are you using the rough scans from Keysight? Artek has scans, although I didn't need to get that set.

I have original manuals (for 4275A and 4274A), and a downloaded PDF of each too.

6. Did you check the "Manual Changes" section of 04275-90012? More changes than most others I've seen.

Absolutely. And most of the changes are on the A9 board, most of them related to the battery-backed RAM option. The way to avoid any problems related to that is to simply remove the battery. A dead battery can cause power-up errors. The rest of the basic circuitry was remarkably stable from the start. This particular unit is from the final serial prefix, though the A9 board is from an earlier unit.

[precaud]

2. With multiple chip failures check the power supply. Is it going over-voltage when turned on? Turned off?

I checked the +5V supply at the board and it ramps up and down smoothly with no glitches or spikes.

Since the cpu is known to be good, I'm going to concentrate on the support chips immediately connected to it. I'm particularly suspicious of the 74LS243 data bus tranceivers, their waveforms aren't nearly as clean as the address bus buffers'.

[precaud]

Update: after wasting another day or two with a logic analyzer with no success, I punted and bought an old Tek 308 data analyzer, which has a signature analysis mode. After confirming the unit works, I checked a known-good unit to verify that it gives identical results to HP's analyzer. It does.

With this cpu board, it gave FAULT condition on every pin probed, even when a scope showed that a pulse train was there. On a whim, I decided to move the clock lead to the opposite-phase clock, and suddenly most (but not all) of the signatures were correct. Very interesting. So problem one points to the two-phase clock generator. It looks good on a scope, but the sig analyzer says they are phase-swapped. Hmmm.

After that, checking the ROM and RAM selectors chips, the input sigs are fine but the outout sigs are all wrong.

So at least now I have some purposeful things to investigate.

(BTW: for anyone who gets a 308, the P6451 probe specifies an 012-0747-00 lead set for it. Just wanted to put it on record that the more common 012-0747-01 lead set works fine.)

[precaud]

It really helps to have the right tool for the job. The signature analyzer is really needed to troubleshoot the digital circuits on this beast.

It found that one of the 74LS138 ROM selectors that I had installed was itself bad.

After that, all of the signatures except the ROMs were correct. Yet it still would not boot.

As Tomorokoshi mentioned, from introduction there were quite a few changes made to the A9 cpu board. This particular board falls somewhere in the middle of the change history. Nearly all of the changes to this board had to do with two things: 1) the morphing circuitry for the battery-backed RAM option, and 2) support for both mask ROM and EPROM firmware, and EPROMs of different size. It turns out the digital signatures for boards with these changes are not completely identical. The data bus signatures are different. This board appears to support EPROMs (has jumpers for it) but doesn't work when they are installed and the jumpers changed. The data bus signatures are different.

Well I don't have time or interest to get that deep with this repair. I have WAY too many hours into this thing as it is. So I decided, as a last resort, to put the mask ROMs back in and test. If it doesn't work, I'll put the unit aside until I find a good cpu board.

To my surprise and glee, it powered up and booted without errors!

So now I can debug the analog circuits. My previous notes said there were issues on the A2 board.

Some notes in no particular order for others who have the displeasure of troubleshooting the digital circuits of their 4275A:
: Although the 4274A and 4275A cpu boards have similar part numbers, it seems they are not identical. When I plug a good 4274A cpu board into this 4275A, it boots but the measurement control is all wrong.
: The firmware available for download on the Yahoo Agilent user group files section works with cpu boards numbered 04275-66529 and later. It is not compatible with 04275-66519 and earlier boards.
: The battery-backed RAM option is pretty useless and is best disabled, IMO. All it does is remember the last setup and restore it. If anything goes wrong with it, (bad static RAM, battery, diode, etc.) the functioning of the entire machine is disabled. Best to just remove the battery and U14 and U15 RAM chips.

And for those using the Tek 308 for signature analysis instead of the HP 5004A:
: The 308 uses a Tek P6107 (13pF) for data input. I don't have a P6107. As I learned, it is pretty finicky about the input C of the probe. A P6106 (10.5pF) didn't work. But a 2-meter P6105 with 13pF input C worked.
: The manual shows the data probe being used without a ground lead. But it absolutely needs the ground lead attached to the circuit! That was the cause of the "clock phase error" issue I was having.

Perserverence furthers. Back to the analog world now.

[Tomorokoshi]

Good to see another success. Interesting how that battery circuit keeps coming up. By chance this thread covers similar gremlins with later models:

https://www.eevblog.com/forum/repair/hp-4194a-impedance-analyzer-a678-boards/

[precaud]

Yes, the unpredictable behavior of HP machines from that era caused by battery issues has created some spectacular buys over the years.

Well the good news with this unit is, it basically works, but has issues in some freq and impedance ranges. Ex: It measures a 1k Ohm resistor across the entire freq range, and gives measurement results one would expect to see. But a 100 Ohm R only works below 1MHz; the display blanks at 1MHz and above. Its a bit more complicated evaluating it using C's and L's due to the limits placed on their displayed values vs freq in the firmware. (See ** below)

The troubleshooting tree symptoms point to the A2 modulator board. The troubleshooting guide table says freq-dependent issues are in the A6 Oscillator. But the oscillator checks out fine. Once again, the manual may be of limited help. My sense is, the issue is downstream from the DUT, in the receiver sections. When the measurement fails, the values in the V and mA displays also fail.

To be continued...

** Some historical and functional context: When it came out (1980), the 4275A (and to a lesser extent the 4274A) LCR meter was the cat's meow, easily outperforming anything else on the market for freq range coverage, accuracy, measurement speed, programmability, you name it. They (and the YHP 4192A) were pretty much the only game in town for high-freq impedance measurement for several years. I spent way too many hours drooling over their specs in the HP catalog.

An annoying idiosyncracy of all of the HP 427x-series meters is the capacitance (and inductance) measurement limits imposed by the firmware at high frequencies. They will simply not allow you to measure large-value capacitors or inductors at high freqs. Example 4275A limits: 200uF max must be <= 20kHz; 20uF <= 200kHz; 200nF <= 2MHz; etc. For capacitors larger than that above those freqs, the firmware simply blanks the displays.

So why did they (YHP) do this? It is now common knowledge that capacitors become inductive at high frequencies. But it wasn't widely known back then. Plus, how to accurately measure low Z at high freqs was still very much an art in progress. LCR meter designers (and marketing dept's) were faced with the dilemma of what to do with large C's (and L's) at high freqs. The fact is, capacitance becomes a meaningless measurement parameter as the phase approaches zero and becomes positive. Yokogawa's solution was to place conservative limits on the range of capacitance they would allow to be displayed at a given measurement frequency.

This was quite irritating for those interested in exploring the behavior of, say, large caps at high freqs. With capacitor in hand, they wanted to know how much capacitance it had at say 1MHz. They didn't want to be told "there isn't any". Even if that was the truth.

Fortunately, there is a workaround. Simply put the instrument in impedance/phase mode and do the math yourself.

Miniaturization and circuit integration has not been kind to these instruments in the 427x series. In today's terms, they are called boat-anchors. But I would argue, not all of them are. The 4274A probably is; you can buy handheld LCR meters that do most of what it does for less than $100. But the 4275A (and 4276A for different reasons) are exceptions. Have you shopped for a 10MHz LCR meter recently? They are still mui expensive. New ones start at near $10,000. That's why this venerable machine has held its value; a good used 4275A is a very reasonable alternative. And that's part of what makes reviving this instrument so compelling to me.

[precaud]

It appears the earlier analysis of issues on the A2 Modulator board was correct. That's where the adjustment procedures fall on their face.

I've attached part of the circuit diagram of the relevant section. The current- and voltage-sensing inputs are conditioned on the input board and fed here into transformer T6 at the upper left. Post-xfmr it goes into two identical MC1496-based circuits. The only difference between them is, one is multiplied by the test signal, and the other by a 90-degree phase shifted version of it. The outputs of these are summed in a diff amp (1/2 of a 1458 opamp) and then integrated (in the other half). The pots R13 and R14 on the non-inverting input of the integrators is for DC offset nulling.

Both sections (in-phase and quadrature) are calibrated by first nulling the offset with a 100kHz test freq, and then verifying that the DC offset (which the instruemnt picks off after the modulator sections that follow) doesn't increase as freqs are increased, up to 4MHz.

And that's where this unit fails. Both sections have offsets that vary significantly as frequency increases, and this stops the bridge circuit from balancing.

The manual specifically states that the probable cause of failure to balance these adjustments is "excessive output voltage" in the U3 and U4 1496's.

This obviously points to replacing the 1496's.

So I pulled the board, checked the ESR of the 33uF lytics in this section, and replaced them, though their ESR was not that high (about 0.7 Ohms) for a 33uF. While doing so, I noticed that the board had been service before. The U3 and U4 1496 IC's had been replaced.

Now this isn't what you want to see when repairing a piece. It suggests that the prior owner had already troubleshooted (troubleshot?) this problem, followed the manual's procedures which led to these 1496's, replaced them, found no improvement, and sold the instrument.

I checked the DC offset of each 1496 at TP8 and TP9, before the nulling integrator. One is 10mV, the other 60mV. It doesn't change with frequency there. So the fault may actually be in the modulator section(s) that follow, also 1496-based. They too see the test freq directly.

[precaud]

I was too tired to post after last night's session ended.

Since the manual specifically stated (in the calibration section) that "excessive" DC offset stops the bridge from balancing, and one of the phase detector demodulators had 6x more offset than the other, and that IC was in the quadrature circuit path (from which reactance calculation is made), I decided to replace that 1496. I have to be selective because I only have three known-good metal-can 1496's in my parts stash. And they are not plentiful on the market. I have several 1496's in PDIP package but grafting one in would not be easy.

So I replaced U3, and measured the DC offset at TP9 at 100kHz. Was previously 60mV. Now is... 60mV. No change. This suggests that perhaps component tolerances are the cause. I compared all the resistors around U3 and U4. No significant difference.

I hate it when things don't make sense.

Checked every inter-stage capacitor on the board and they all look fine.

Went back and redid the A2 balance cal procedure, and was able to get the two sections to balance at 100kHz. It holds up until 1MHz, when the quadrature section offset jumps way up and the displays blank just as before. So a minor improvement but still the same fault symptoms.

Am mulling where to go from here. Maybe replace the 1458 opamp with something that has lower guaranteed offset spec? Any other ideas?

[precaud]

I replaced U8 MC1458 with an LT1013. DC offset at TP9 went from 60mV to 3mV. If the manual is to be believed, that, should improve the balance.

After warmup, readjusted the 100kHz offsets. No change. And same with measurements of 100 Ohms and less, which are OK up to 400kHz and blank displays from 1MHz and up. So something else is causing this problem.

[precaud]

I think I found the cause. It's in the lower left corner of the diagram posted above. The 90º phase shifter is more like 150º. At all freqs. Crossing fingers that it is not Q10 that is bad, that is a 6-legged MOSFET (1855-0261) made by Sony that will likely be difficult to find...

[precaud]

Returning to the analogy I started with, this circuit is the bear's lair, where it drags its kill and munches leisurely. I took the schematic and removed nonrelated portions to isolate it.

The purpose of this little circuit is to generate a quadrature (90º phase-shifted) version of the sinewave test signal, from 10Khz to 10MHz in 1-2-4 sequence. No small feat. (Nowadays, with a fast-enough DAC, you'd probably just do it digitally.) The operation of this A2 modulator board (especially at high freqs) depends on it generating a precise 90º shifted version.

I do not understand how this little circuit works. I've never worked with the 1496 modulators before. The manual doesn't describe the circuit in detail, but says to verify that the output at TP3 (lower right) is precisely 90º offset from the 0º input at TP5 (center top) at all freqs.

And it isn't. It's more like 150-160º, not quite inverted, over the whole range. So the circuit is generating a constant phase offset, just not the correct one.

In case of error, the manual says to check U1 (a 1458 opamp) and U2 (a MC1496 mod/demod). Since I have those parts, I just replaced them rather than figure out if they were good or not. Unfortunately, that made no change.

Before going further, I checked all active devices (except Q10) and capacitors and saw nothing wrong.

Overview: The test signal enters upper left "Osc in", is xfmr-isolated and goes through an AGC leveling amp. This is the in-phase reference signal. It feeds the 0º detector and phase-tracking, and is the input to the 90º shifter. It is buffered and drives xfmr T3. One side of T3 has two capacitors that are switched in by comparator U10 depending on the freq range, which is controlled by logic coming from another board. I verified that this part works properly.

Within each decade range, the signal coming from U2 & U1 controls the phase offset via the mosfet Q10. I do not know how to debug this. But it appears to me either T3 or Q10 are the faulty parts. If I see opposite-phase signals on either side of T3, it should be OK. Will check it today.

But the main suspect is Q10. This part is made by Sony and marked as "429D". The only info I find about it is:

www.ozvalveamps.org/repairs/circuits/stomps/tx-429d-datasheet.pdf

It appears to be unobtanium.

I welcome any suggestions.

[precaud]

Further thoughts. I think they're using the mosfet as a variable resistor, changing the time constant of the LC it is paralleling (1/2 of T3 and the selected capacitor). So is the signal at TP1 a DC proportional to the phase difference between the input (sampled via C4) and the phase shifter (via C21) ?

This appears to be the same part as the Sony one:

https://www.mouser.com/new/vishay/vishaysia429djt/

Its no longer available in PDIP so I would have to kludge the SC-70 package in.

[Tomorokoshi]

I got as far as this:

The Japanese document claims that the Sony TX-429D is an N-Channel device. The Mode is not specified. I suspect Enhancement Mode should be fine.

It is unclear if the Vishay part just happens to use the same "429". Alternatively, the Japanese datasheet could be incorrect.

Trolling around Digi-Key got results in N-Channel similar to your option:

https://www.digikey.com/product-detail/en/diodes-incorporated/DMN32D2LDF-7/DMN32D2LDF-7DICT-ND/5218399
https://www.digikey.com/product-detail/en/rohm-semiconductor/QS5K2TR/QS5K2CT-ND/1144089
https://www.digikey.com/product-detail/en/on-semiconductor/CPH6636R-TL-W/CPH6636R-TL-WOSCT-ND/8538394

[precaud]

I got as far as this:
The Japanese document claims that the Sony TX-429D is an N-Channel device. The Mode is not specified. I suspect Enhancement Mode should be fine."

Thank you for looking at this, Tomorokoshi. I didn't know what to make of it.

It is unclear if the Vishay part just happens to use the same "429". Alternatively, the Japanese datasheet could be incorrect.

Yes, that is uncertain. The HP manual isn't of any help. The parts list describes it as "TEANSISTOR MOS-FET PD=100mW ID=15mA"

The Vishay part will not work, it has a diode from source to drain.

This link describes the 429D as a P-channel:
http://www.ozvalveamps.org/repairs/tx429d.htm

This is a schematic from a Korg guitar EQ pedal that used it. It looks like the same device.

[rf+tech]

Hello precaud,

The suspect Q10 can be tested in-situ by removing U1 and applying a bias voltage to TP1. Monitor the phase across the shifter, while varying the applied bias, to see if the phase varies as expected.

RF+ Tech

[precaud]

That makes sense, thanks for the advice.

I did some looking last night for other HP instruments that use the 429D mosfet and the same xfmr T3. And found that the 4274A has them as well. So I should have good spares for both of them if needed.

[vtp]

Seems like interesting circuit. Good source for circuit theory could be googling "90 degree phase shifter". In the results there should be W. Wiebach article about dome filters. The text contains also references to other publications.

The transformer appears to have been used only for galvanic isolation. Bottom leg of the output is capacitive with switched ranges and top leg is adjustable resistor to fine tune the phase shift. MC1496 appears to be phase detector so they want to see 90 degree phase difference between the circuit and it's reference. The output is used to adjust the resistance in the transformer top leg output. Seems like a RC phase shifter, I am not sure if it's dome filter or something else but the transformer driver looks a bit weird.

If your Q10 indeed is dud you may want to take a look at CXD7500M.

[rf+tech]

For reference, CXD7500M can be found in the 1992 Sony Discrete Semiconductor Databook (link ftp://bitsavers.informatik.uni-stuttgart.de/components/sony/1992_Sony_Discrete_Semiconductor_Data_Book.pdf)

Extracted CXD7500M-specific pages are attached below.

RF+ Tech

[precaud]

I didn't expect it to be bad, but for certainty's sake I tested the T3 xfmr, it is fine.

As rf suggested, I then pulled U1 and applied DC voltage to TP1 while monitoring the original and shifted waveforms. Changing the DC did not change their phase offset, which suggests that the mosfet is bad.

So I swapped in a 429D from a 4274A board, reinstalled U1, and tested. The only change is, the waveforms are now exactly 180º out of phase instead of the 160º they were with the original mosfet.

I have tested or replaced all of the active components in this loop. I guess I have to check all the passives too.

[precaud]

Referring to the diagram in reply #15, the way I see it, the phase-fine-tuning action of Q10's variable R only works of it is in the same general impedance range as the capacitors it is in parallel with. With the waveform at TP3 always at or near inverted, the circuit is acting like there is a low impedance (large capacitance?) across C44 at all times. That's the only thing I can see that would essentially swamp the tuning action of Q10 in conjunction with the capacitors being switched in, and result in very little DCV variation at TP1. It's still not clear to me what the mechanism is that causes this circuit to seek balance at 90º offset. But the major part of the tuning is being done by C46 and C49 being switched in at the appropriate freq range(s). So Q11 and Q12 will get tested out of circuit today. According to the logic table, those switches are never closed at the same time. The logic (latches) that controls them is on the A3 board so that will get checked too.

[precaud]

Finally something makes sense. Both FET's are shorted. Which means, as I had reasoned, all capacitors were in-circuit all the time. Which, in normal operation, never happens.

Once again, the 4274A carcass to the rescue. The parts list says it has 12 of 'em. I started pulling and testing them one at a time. Most of them were bad. It took 10 to get two good ones.

The HP part number is 1855-0091. An N-channel JFET, probably selected for low on-resistance. A quick search revealed others having difficulty finding a cross for it in the recent past. The closest being a 2N4391. I probably should get some spares to have on hand.

I'll install these two and test after dinner.

EDIT: OK, I couldn't wait. Unfortunately the new FETs made no difference.