Needing to replace the displays in gear like this is why a project like the "universal" LCD controller idea that we were talking about back in places like the 128-x-64-mystery-lcd-identify thread would be a useful device!
Yep. Couldn't agree more. And the latest experimental evidence is that an Arduino Uno (all I have lying around) isn't nearly capable enough! Who would have thunk it, eh?
The strategy I'm adopting on this end, owing to the display controller being integrated on to the O1V's motherboard, and thus driving a relatively dumb yet accessible display, is to attempt to capture the post-controller signalling. Even with the Uno, the results aren't entirely disappointing:
For a 320 x 80 display
Frame changed state to 1 in 14268 uS
Row_CLK_Count/Col_CLK_Count: 79 553
Frame changed state to 0 in 14276 uS
Row_CLK_Count/Col_CLK_Count: 79 554
Frame changed state to 1 in 14272 uS
Row_CLK_Count/Col_CLK_Count: 79 554
Frame changed state to 0 in 14272 uS
Row_CLK_Count/Col_CLK_Count: 79 554The Uno, with its two hardware interrupts is doing three things:
1) On Row_CLK falling edge increases a counter (Signal LP @ ~5.6KHz in the
controllers datasheet, page 17). 79 rows on account of timing issue (1-indexd) or perhaps the controller never writes to the last row.
2) On Col_CLK falling edge increases a couple of counters and writes the data values (Signal XSCL @ ~1.792MHz x 4bits data = 7.168Mbps) to rotating SRAM. We can see that the Uno's maximum interrupt servicing rate is pegged firmly at ~38KHz - far shy of the ~1.7MHz required to effectively capture every pixel. It doesn't matter if one attempts to calculate Pi to a million digits in the ISR. 38KHz is all the little brain can perceive externally.
3) Looping to detect the rising/falling edge of Frame_CLK (Signal WF @ 2 x 35Hz) and writing data out via serial.
Conclusions / Suspicions / Observations:
Janky tacked-on setup possibly ruining the higher frequency signals.
Perhaps looping on the pixel clock and utilising interrupts for slower tasks would be more fruitful? Potentially slashing the output framerate to allow for slower and more reliable external communication.
Perhaps one of the latest 32-bit ARM-based nanoboards clocked at 120MHz can keep up with the pixel clock rate via ISR???
One of the more expensive FPGA-included nanoboards could
almost certainly (
?) be completely effective (

?) as a Universal LCD signal recorder/rebroadcaster??? To a reasonable point, obviously. Don't expect to be reinventing the HDMI capture card.
P.S. Was never expecting success with an Uno, just in case anybody wondered. It doesn't possess enough RAM, at 2048 bytes, to store a single frame of 320 x 80 even if it were squished down to 1bpp. Just getting a feel for that required to service this particular bee in one's bonnet.