BG7TBL 6 GHz RF prescaler

[Scratch.HTF]

I got this unit at a good price, but its division ratio (1 million) was too high and I wanted programmable division ratios - the best thing about this unit is that it had a PLL (ADF4106) programmed with its MUX output outputting the RF input frequency divided with a freely programmable ratio (24-524288) - even though the ADF4106 had a minimum RF frequency of 500 MHz, it was stable down to 10 MHz.
Pulses are clamped to +/- 265 mV with two pairs of back to back RF diodes via a series capacitor and a 9R0 resistor; I believe that the safe maximum input is 3V peak to peak (or 1V RMS).
The short output pulses from the ADF4106 go to a divide by 2 flip-flop (most likely a TC74WH74 which regulates duty cycle to 50%.

During testing of my code, I had problems with using high (32/64) prescaler values and low B counter values which resulted in a prescaler increment of 1 (33/65) and bypassing of the A counter (before the flip-flop for both and Divsion Ratio = (Prescaler * B) + A, 99 was the result with a target of 100 with Prescaler=32 B=3 A=4 and 455 was the result with a target of 500 with Prescaler=64 B=7 A=52), but I did not have this problem with low (8/16) prescaler values although I had to limit input frequency ranges because the internal prescaler output frequency is limited to 300 MHz as per the ADF4106 datasheet, but I did successfully program the division ratio for full range frequency input use at the expense of output resolution (10 kHz input step = 1 Hz output step).

For a Hantek HDG2000 series (with a configuration hack to enable the 2.7 GHz counter), Prescaler=16 A=0 B=16 (division ratio 256 required by the HDG2000) can be used for up to 4.294967295 GHz (anything above will cause the HDG2000 counter to overflow as the frequency value in the HDG2000 is 32 bit unsigned); for switchable full range being divided by 10, Prescaler=64 A=0 B=40 can be used (division ration 2560 - full range), but if you have division ratio problems, Prescaler=32 A=0 B=80 can alternatively be used (up to 9.6 GHz which the ADF4106 is most likely not be able to handle this frequency).

Finally, I've posted an Arduino sketch here (it is .TXT because .INO files are not accepted at the time of posting) to program the division ratios (50/100/1000/10000 - 2.4G/4.8G/4.8G/full) - CAUTION: the microcontroller (ATMEGA8) and ADF4106 run on +3.3V, so you need a programmer supporting (and switched to) +3.3V signalling (and +3.3V power if supplied) or damage can occur - I made a simple adaptation to a USBasp ICSP programmer so that the microcontroller (and ICSP signalling) runs on +3.3V and it happily works!
This unit draws approximately 30mA, meaning it can be run directly from the +3.3V supply on an ICSP programmer, and there are no locks to prevent reprogramming of the microcontroller despite code and EEPROM being read protected.

[Scratch.HTF]

Attached is the circuit of the prescaler; note that there is no Reset capacitor and therefore, requires the Brownout Detector (BOD) option to be set to 2.7V which will automatically reset the ATmega8 on undervoltage.
The ADF4106 datasheet also mentions that the RF input is 50 ohms at 5.8 GHz but not at lower frequencies.

Saying again, the summary of important settings are: No bootloader required, 8 MHz internal clock and 2.7V BOD - all of these have been set in the attached HEX file.
And remember to use +3.3V I/O and Vcc.

[Scratch.HTF]

According to the ADF4106 datasheet, the B counter value must be greater than or equal to the A counter value and therefore, the aforemtioned problem was caused by programming the A counter to a value higher than the B counter; it wasn't caused by high prescaler values and low divider values.

[Mightybeard7]

@Scratch.HTF Can you share the schematic of this design. It would help in my design, I am designing a PLL using ADF4106

[Scratch.HTF]

It has a new home: https://github.com/brycecherry75/BG7TBL_6GHz_Prescaler