Electronics > RF, Microwave, Ham Radio
Any RF wideband transceiver which supports fast frequency hopping of 1000 hops/S
sangar:
Hello All,
I am looking for RF wideband transceiver with the interest of band of 4-5 GHz and it should be capable to achieve 1000 frequencies hopping in one second. Initially, I analyzed AD9361 and AD9371 for this purpose. But, after discussed with Analog devices, it seems to be difficult to achieve with them. So, any of you know the fast frequency hopping RF transceiver, please share with me...
Thanks,
Sangar
rhb:
You might want to consider using a pair of ADF4351s. A brief perusal of the datasheet suggests that you can change frequency in <1 mS. So if you heterodyne a pair of them you should be able to cover the range of interest.
Another possibility is to use an AD9851 and multiply the output frequency before mixing with an ADF4351. That will certainly meet your hop requirement easily. But at the price of more difficult filtering to suppress harmonics.
Otherwise, an FPGA based AWG with multiple outputs multiplied to span 1 GHz and then mixed to the target band.
After considering it a bit more, 3-4 ADF4351s and some RF relays. Use one at a fixed frequency and hop the others. Switch between them if you can't get just one to lock fast enough after a hop. Because they are square wave outputs in the 2-4 GHz range, it's easy to filter out the harmonics.
sangar:
Hi,
AD4351 is the solution with AD9361?
rhb:
What did AD suggest doing? What is the goal? Why this combination of specs?
The AD9361 will take an external LO and the AD9910 will cover 400 MHz and hop much faster.
Fast hopping is easy over narrower ranges and broad ranges are easy hopping more slowly. It's hard to see a justification for such slow hopping over such a wide range. What do you expect to gain?
You should be able to get very fast hopping over 1 GHz range by PIN diode switching among 3 ADF4351 + AD9910 LOs into the AD9361 external LO input with each ADF4351 + AD9910 set to hop a different segment of the band. But that's going to get very difficult to implement.
I suggest using the ADIsimPLL and ADIsimRF programs to simulate what you want to do.
David Hess:
Is the limitation on how quickly the local oscillator frequency can be changed due to the frequency synthesizer or the digital interface?
Details are scarce in the datasheets but they appear to both use a DDS to drive a fractional-N PLL frequency multiplier which should inherently have a fast settling time because the high PLL reference frequency allows for a wide PLL bandwidth.
Using an external synthesizer with a fast settling time as described above for the local oscillator should solve this problem. This is especially the case if the frequency step size is sacrificed allowing for a higher reference frequency for the PLL frequency multiplier.
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