Author Topic: Cheap stable VFO design  (Read 18264 times)

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Offline GK

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Re: Cheap stable VFO design
« Reply #50 on: June 04, 2016, 01:18:34 am »
A respectable 40m Colpitts oscillator can still be made with a BJT. One benefit a properly biased BJT gives over a self-biasing JFET is predictability in operation particularly with regards to signal amplitude. In this kind of circuit the biasing point of the transistor strongly influences the amplitude of oscillation and with JFETs this can vary quite significantly due to the large parameter spreads of those devises.

I've made a few quick mods to the presented circuit to bring it more or less in line with what it should look like. To keep the tank circuit Q decent with the effective loading you should stick to an inductance <=2uH in value. You can compute the theoretical best case Q simply by dividing the parallel resistance across the tank circuit by the reactance of either the L or the net parallel C (they are both the same) at the resonant frequency. Basically >C with <L = >Q. But with >C you'll need a varactor with >variation in C too, which will be a limitation when using generic diodes like the 1N400x series as the amount of C variation over a practical range of reverse bias voltage is not particularly great.
Note this is only a SPICE sim and a real world example might need some empirical tweaking of the transistor DC bias point to get the amplitude of oscillation right - you don't want the varactor diodes to forward bias at the minimum DC tuning voltage (which should limited to perhaps no less than a volt or two).   

« Last Edit: June 04, 2016, 01:33:01 am by GK »
Bzzzzt. No longer care, over this forum shit.........ZZzzzzzzzzzzzzzzz

Offline G0HZU

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Re: Cheap stable VFO design
« Reply #51 on: June 04, 2016, 11:43:37 am »
Yes, a bipolar transistor will be the low risk choice for mass production. I'd still prefer to make a JFET VFO/VCO for a one off homebrew design though...
Some people have claimed great success using a Vackar circuit using a JFET (or a bipolar) device so maybe the OP could google for this?

Because the OP's original circuit locks the varactor bias at 0V I think the RF waveform will explore the region towards forward bias on part of the waveform.

I think the diode will then begin to resemble a very non linear capacitor and the capacitance will increase a lot towards the (negative) waveform peak. So this will be what pushes the frequency down. So I think the tuning mechanism for the original circuit will come from tuning the damping resistance via the emitter follower. The waveform won't have to get fully towards forward bias to give the 'tuning effect' and so it won't be obvious (on a scope) what is actually happening in the circuit.

For this reason I'd expect the OP's circuit to be very sensitive to temperature changes so this is another reason the design is poor. It would probably 'tune' if you forgot about applying a tuning voltage and removed the emitter follower (and the associated bias voltage) and simply replaced the 1k resistor with a passive trimmer resistor to ground. I suspect that you wouldn't have to change the resistance very much to see the frequency change by the required 40kHz. See the image below.

I wouldn't recommend anyone to make/build the circuit below because it will be just as poor as the original circuit. The circuit below is not a good one :)
« Last Edit: June 04, 2016, 11:47:16 am by G0HZU »

Offline StillTrying

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Re: Cheap stable VFO design
« Reply #52 on: June 04, 2016, 08:51:58 pm »
So what does the schematic look like now?

I dunno, as far as I knew 2 circuits had been built, and there was just me trying the simulation.
I was only interested in the tuning diode operation, even/especially if it was unconventional, as a way to edge a digital circuit's clock xtal in the right direction, so this latest simulation version is almost the same as the one I posted above, but you can certainly have it.
« Last Edit: June 04, 2016, 09:23:16 pm by StillTrying »
.  That took much longer than I thought it would.

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