Cascode LNA output impedance and matching

[init]

I am in the process of designing a LNA using cascode amplifier arrangement and have a few questions. You can see the circuit simulation in the images below where I am trying to measure the output impedance using a 1m AC sweep looking at the voltage of the test source divided by the current leaving the source. I have tuned the amplifier to roughly 100MHz, ignoring BW for now as I am looking at some basic proof of concept.

The issue I am having is this: By itself the amplifier works as I would expect with a large voltage gain around 100MHz, however when I connect this circuit to another, it will load the output causing a change in the amplifier operation. Usually I would design a matching network to connect these two stages together, however looking at my output impedance (assuming I have calculated it correctly), it is about Zout = -3960 - 41j. My first question is this, how do you match a negative resistance? and secondly how do you match the circuit with such a large impedance? Are there other methods for buffering the output with a high input impedance, low output impedance CC/CS stage?

EDIT: I should mention, the mosfet model "AAA" is a custom one I made that has smaller capacitances and threshold voltage.
.model AAA VDMOS(Rg=3 Rd=2.1 Rs=1.7 mtriode=.8 lambda=0.01 Vto=0.7 ksubthres=70m Kp=42m Cgdmax=3p Cgdmin=3p A=1 Cgs=3p Cjo=3p M=.25 Vj=.9 Is=600f Rb=.3 mfg=Infineon Vds=12 Ron=2m Qg=4.3n)

[T3sl4co1l]

I don't see how you've measured it.  If both sources are active, you'll get a superposition of voltages and currents, the ratio of which may not be representative.

It's fine to match a negative-real impedance into an opposite load.  The conventional positive-real case, should have conjugate (opposite imaginary part), which cancels reactance, maximizing real power.  In case real is negative, it can be canceled with parallel or series load [positive] resistance, and the reactive part still needs to be canceled.  This gives a constant voltage or current source (depending on your perspective) and full power, rather than 1/4 power that the impedance matching theorem says in the usual case.

Naturally, negative resistance probably means you have a bigger priority, like conditional stability, or outright oscillation.  Neither one of which you have much idea about in AC small signal analysis.  You have to use transient for that to be sure.

The rather large Cgd sounds suspicious to me. Are you sure those parameters are representative?

Tim

[uncle_bob]

Hi

You may want to study up a bit on matching RF circuits. After that check out stability analysis.

Hint: Take a look at what the stage gain would be matched into your proposed load. Then take a look at the isolation across the stage ...

Bob

[init]

I don't see how you've measured it.  If both sources are active, you'll get a superposition of voltages and currents, the ratio of which may not be representative.

I've removed the source and done the same measurement, it has no effect since it has no voltage defined for AC analysis.

It's fine to match a negative-real impedance into an opposite load.  The conventional positive-real case, should have conjugate (opposite imaginary part), which cancels reactance, maximizing real power.  In case real is negative, it can be canceled with parallel or series load [positive] resistance, and the reactive part still needs to be canceled.  This gives a constant voltage or current source (depending on your perspective) and full power, rather than 1/4 power that the impedance matching theorem says in the usual case.

Naturally, negative resistance probably means you have a bigger priority, like conditional stability, or outright oscillation.  Neither one of which you have much idea about in AC small signal analysis.  You have to use transient for that to be sure.

The rather large Cgd sounds suspicious to me. Are you sure those parameters are representative?

To be frank, I have no idea what Cgd should be. The data sheet I'm looking at has input and output capacitance specified which are around 3pF which I guess are more akin to the miller representation of the capacitances, I didn't think that much about it, my bad. What are some more sound values for Cgd?

I changed my Cgd to 0.1pf and I am getting a real positive value for impedance now, perhaps it was too high.

[uncle_bob]

I don't see how you've measured it.  If both sources are active, you'll get a superposition of voltages and currents, the ratio of which may not be representative.

I've removed the source and done the same measurement, it has no effect since it has no voltage defined for AC analysis.

It's fine to match a negative-real impedance into an opposite load.  The conventional positive-real case, should have conjugate (opposite imaginary part), which cancels reactance, maximizing real power.  In case real is negative, it can be canceled with parallel or series load [positive] resistance, and the reactive part still needs to be canceled.  This gives a constant voltage or current source (depending on your perspective) and full power, rather than 1/4 power that the impedance matching theorem says in the usual case.

Naturally, negative resistance probably means you have a bigger priority, like conditional stability, or outright oscillation.  Neither one of which you have much idea about in AC small signal analysis.  You have to use transient for that to be sure.

The rather large Cgd sounds suspicious to me. Are you sure those parameters are representative?

To be frank, I have no idea what Cgd should be. The data sheet I'm looking at has input and output capacitance specified which are around 3pF which I guess are more akin to the miller representation of the capacitances, I didn't think that much about it, my bad. What are some more sound values for Cgd?

I changed my Cgd to 0.1pf and I am getting a real positive value for impedance now, perhaps it was too high.

Hi

Doing RF circuits from models has limited value. The normal issue is getting all the strays into the model. Doing it with device models that are way off ... don't even bother. Just wire up the circuit and tune it up.

Bob

[Fank1]

LT Spice will do the calculation for you.
Remove the voltage on the output and replace it with R5.
Add the spice directive " .net I(R5) V1 ".
Look at the available traces it will show Z(out), Z(in), S11, S21, S12, S22.

[G0HZU]

The other option is to build the core of the cascode circuit in a test jig and extract a small signal two port model of the basic cascode section (at your chosen operating point) with a VNA and then add your matching components in a simulator. This assumes you can keep it stable when it is connected to the VNA like this. You won't be able to simulate the noise figure like this but at least you could do some basic tests on the simulator.

Once you have the two port model you can do some useful work on a simulator, especially if you want to add other sub circuits and see how it all interacts etc.

Your choice of 25nH in the drain seems a bit odd because this will give a very narrow response at resonance at 100MHz.

[bson]

LT Spice will do the calculation for you.
Remove the voltage on the output and replace it with R5.
Add the spice directive " .net I(R5) V1 ".
Look at the available traces it will show Z(out), Z(in), S11, S21, S12, S22.

Nice - I had no idea!!!