DCF77 / TDF receiver - critique my first design

[faust1002]

Hello guys,
I am an embedded software developer working on various different radio access technologies, like LTE and NR. After several years in this industry I decided to design my own piece of hardware. I wanted it to be related to RF and at the same point simple enough for a beginner.
Short theory of operation
1. I have no idea what input signal level expect. Furthermore, based on what I found, this may vary depending on a location and a direction of an antenna. Therefore I don't know how much gain I need. That is why I decided to use a digital potentiometer (U5) to set gain digitally. Furthermore, an operational amplifier (U4A) acts as a differential amplifier to set a virtual ground for the gain stage (U4B).
2. I want to use single voltage rail, therefore I must use an inverting configuration (at least this is my understanding).
3. I initially thought about designing DCF77 receiver, but then I learnt that there are other similar standards, like TDF for instance, operating in a similar frequency bands. Therefore finally I decided to create an analog fronted, which is capable of receiving a wideband signal between 50kHz - 200kHz (Butterworth filter, U4C and U4D), roughly speaking. Then I will do additional digital filtering to get my signal of interest.
My requirements and extra comments.
1. I am a software developer, not hardware designer. This means that I don't necessary know what I am doing
2. I haven't simulated my design yet. I want to know if I go in the right direction and what alternatives I have before I will put more time in this project.
3. I have no soldering equipment at home. Therefore I decided that I will get my project assembled by JLC PCB. This means, I was limited by component available in their library. On the other hand, I could use SMT component, which would be a pain in the neck to solder on my own.
4. I also didn't want to create my own component models. Therefore my second requirement was an availability of models in KiCAD or in Ultra Librarian.
5. I selected STM8L151K4T6 for a couple of reasons:
- it seems simply enough for beginning
- maybe at one day I decide to create a battery powered version of my project. Then low power micro would be useful.
- I have ST-Link available
6. I know that it is possible to receive DCF77 signal using a single diode and BJT, but I wanted something more interesting.
7. This project is made purely for fun.

I really curious to get your feedback. I will appreciate it.
Kind regards

[Kleinstein]

Unless one is very close to the station the signal level is quite low. So the LM324 is not a suitable amplifier, at least not for the initial, noise sensitive part.

One can do a lot of the reception in software, but it still need some initial low noise amplification and filtering. The first filtering is usually a resonant antenna (ferrite rod or a larger area air coil), followed by a low noise amplifier (e.g. a discrete JFET) directly at the antenna.

The STM8 µC may not have the power to really do the full software defined radio at the high frequency. For this is would be more like STM32 level with a better ADC and more power.
It may still work with an external mixer to make it s super-het receiver. A simple straight through receiver can be tricky, as the gain needed is quite high and there is a good chance to get oscillation from parasitic feedback from the amplifier to the antenna. At least it would need some experience.  One should still get a soldering iron to do some soldering yourself. At least the antenna and also some teaks should really be done locally. It would be hard to make is work without a scope.

I don't think this is a good project for an absolute beginner.The beginner level would be more like using a ready made receiver module and do the decoding part. To get the time from the pulse pattern.
A simpler slightly RF like project could be something like an ultra-sonic sender and receive circuit. This could be either continuous or pulsed (e.g. echo detection for a distance measurement).

[faust1002]

Thanks for your reply. I want avoid a precisely tuned tank circuit, because I want my frontend to cover more than more one standard.
I can replace LM324 with something based on JFETs, for instance some variation of TL074. Should be good enough. What do you think?
I would still claim that STM8 micro has enough horse power for this project. First of all, we are talking here about a carrier frequency in order of kHz. Secondly, the internal built-in clock goes up to 16MHz. Finally, it has 12-bit, 1Msps ADC. Plus reasonable amount of FLASH and SRAM. What else do you need to process low-frequency signals?
Kind regards

[Kleinstein]

The STM8 may be OK, but it can still need quite a few operations to do the signal processing. I don't know the STM8's very well, but with the small ones, one may run out of RAM (if FFT us used) and calculations with 16 bit or 24 bit numbers get quite a bit slower with a 8 bit µC. The SW may need things like look-up tables for sin/cos and these may take up quite some memory.  Chances are it can work, but there could be limitations.

One would hardly get around the tuned antenna to get good sensitivity. A good antenna is the best amplification and keeping the BW low from the beginning reduces problems with the dynamic range and strong local interfering signals (e.g. SMPS).
With only 12 Bit ADC resolution one would likely need quite some analog filtering, as there can be quite a few strong sources of interference, even without the old TV sets in the old times.

The TL074 is not really that low in noise - it would still reduce the sensitivity quite a bit, especially if used without a resonant antenna. At least it may be fast enough.  It may work with the TL074 if a good tuned antenna is used, but hardly without. Similar a non resonant antenna may just work with a really good amplifier (e.g. good discrete JFET).

[faust1002]

I am not worried about the digital part. They pay me to do similar things, so I guess I know how to do this correctly

About analog filtering - I added a bandpass filter. I suppose this will be enough. Of course I can do something much more complex, but this will not help if intereferences are present in the band of interest.

About the resonant antenna, I believe that covering more than one carrier frequency might be possible, but hard. It is correct?

Rolling my own discrete, low noise JFET amp is beyond my capabilities now. Therefore I will build the first prototype and see that input levels I will get.

[AndersJ]

Some of your resistors are very small.
Such as LED serial r’s and those in the filter.

[capt bullshot]

So you want to receive DCF and the like within 50 ... 150kHz?
LM324 is too slow to provide reasonable gain here, TL074 requires a bipolar supply of at least 9V (ballpark) differential between V+ and V-.

To get enough signal input to the ADC, you'd have to amplify a 10uV ... 1mV signal to a 0.1Vpp to 3.3Vpp signal (your ADC should be able to work within that range), that's a gain somewhere in the range from 1000 ... 10000. From a personal project of mine, I've got good results with a total gain of 3300, split into three amplifier stages. To run the amplifier from a single 3.3V supply, I've used the TLV2372 OpAmp (also available as a quad, TLV2374). For strong signals, I've added a simple limiter using back-to-back diodes. For this particular project, a variable gain wasn't necessary, as the dynamic range of the MCUs ADC was sufficient (your STM8 has only 10 bits, the STM32 I used has 12).

If you want to do direct carrier reception, a bandpass filter is a good choice. To suppress noise and interference, it is best placed before the high gain stages, say a tuned ferrite antenna will give best results. Anyway, I've got good results using an untuned antenna too with my project,
look it up here for your reference:

https://wunderkis.de/dcf-rcvr/

[faust1002]

@AndersJ
I want to use green LEDs. Based on my knowledge, they draw about 20mA and their voltage drop is about 2.2V. Therefore I guess that 56Ohms is enough here.
Resistors in the bandpass filter were calculated with the assumption that I would use 47nF capacitor. I also believe that they are correct.

@capt bullshot
I am familiar with your design. I found it while researching my own project. Your website says you used TL072, hence I replaced LM324 with TL074. But TLV2374 seems to be much better choice.

Quick question - what are benefits of splitting the gain stage into three steps.

Extra footnote - my micro has 12-bit ADC, at least according to its datasheet

[capt bullshot]

I've changed the OpAmp on the way from first perfboard prototype to the final board, just for the reason of a single 3.3V supply.

Splitting the gain: It's for BW and DC stability. Your typical TL074 has about 3MHz GBW (gain bandwidth product), so a single 1000x gain stage would have a resulting BW of 3MHz / 1000 -> 3kHz, way too low for this purpose. Having three x15 stages results in a BW of 200kHz per stage, and somewhere above 100kHz for the chain. Also, the AC coupling between the stages helps dealing with the input offset of the amplifiers. A single stage would show 1000x the input offset voltage (in the single volt ballpark here), due to the capacitive coupling only the last stages input offset is of concern in my design (a mere few mV * 15 -> some 10 mV).

Didn't look up your micros datasheet, the last STM8 I'd used had a 10bit converter.

Edit: There's quite a gotcha when designing filters with OpAmps: Usually one uses some kind of design software to determine the components (at least today, back in the days, it was a bunch of formulas to solve on your own). A good filter designer informs you about the required GBW of the OpAmp, take this for serious. An LM358 or TL072 often doesn't have enough GBW for an analog filter.

[faust1002]

Thanks for your clarification. I guess I will add another jellybeam opamp to set a virtual ground. Then, I will divide the gain stage - one with fixed gain and the other with variable one.
I will update my design in the evening.

[Kleinstein]

For the analog part there are mainly 3 difficulties:
1) Avoiding interference from strong other signals like a SMPS. Even with a 12 Bit ADC this essentially needs quite some filtering before the ADC.

2) keeping the noise down. This is mainly about the first stage. A parallel resonant antenna has a high impedance an is thus reasonable well matched to a FET amplifier. This can be a good OP, and even the TL074 may not be so bad, but there are better ones. A non resonant antenna usually has much lower impedance and would need a lower noise amplifier. Here the Tl074 is likely not sufficient. A resonant antenna really makes things easier as it also provides initial filtering and thus help with the 2 fist points.

3) The probably most tricky part is avoiding oscillation due to coupling back the the signal from the amplifier output and supply current to the antenna. Even with better behaved super-het receivers the usual way is to keep the antenna at some distance form the main  circuit and only have an initial amplifier directly at the antenna. Using a virtual ground can be tricky in this context.

[MarkMLl]

I've been playing with one of these https://www.amazon.co.uk/60kHz-Atomic-Clock-Radio-Receiver/dp/B01KH3VEGS rather than a discrete design and find that it's extremely susceptible to RFI, which makes me wonder what precautions will need to be taken to prevent noise propagating from the microcontroller to the head-end. Also as I've noted before the C1 variant of the chip used on that module doesn't allow the phase of the input to be tracked, which at least in the case of MSF is an important part of the timing information.

A tunable receiver with provision for an external antenna, signal strength meter and phase recovery would /very/ nice to have...

MarkMLl

[Kleinstein]

The RFI emissions from the µC should not be so bad, as this is in a different frequency band. The tricky part in a simple single frequency receiver is the last amplifier stage that may produce a magnetic field that can be picked up by the antenna.

A kind of software defined receiver should also recover the phase information. The German DCF77 signal also contains some phase modulation part for extra precision and extra information, though not really needed for just the time.

[chris_leyson]

ARM Radio springs to mind. https://www.sdradio.eu/weaksignals/armradio/index.html

[faust1002]

I updated my design based on your feedback. My changes include
- Splitting the gain stage into two parts. The first part has a fixed gain, about 12. The gain of the second part depends on the setting of the digital potentiometer.
- Replacing the bandpass filter with a low pass one. I didn't have any mixer anyway, therefore this hardly matters for me. The roll-off frequency is about 170kHz.
Your comments are welcome.

[bsdphk]

I would roll of a bit higher to also get 198kHz inside the reception window.

You may find some inspiration in two of my old Loran-C projects:

http://phk.freebsd.dk/loran-c/

http://phk.freebsd.dk/AducLoran/

[capt bullshot]

LF393 won't work from a single 3.3V supply.
The filter circuit around U5 looks buggy to me, you've got R20 and R24 connected to GND from an OpAmps output, this looks wrong.
Anyway, better use a real OpAmp symbol for U5 and U3, this makes the schematic more readable.
Any capacitors within the filter network that are connected to virtual GND can be connected to real GND for better results.
Don't separate GND and AGND, use a bold GND plane for everything.
Double check the need for the buffered virtual GND, often this can be replaced by a simple resistive divider and a cap to GND, given that all nodes connected to this virtual point are high impedance (say otherwise unconnected "+" inputs of OpAmps), you can choose an appropriate filter circuit to achieve this. An LM358 as a virtual GND loaded by AC (through the capacitors in the filter network) but not AC bypassed can lead to "interesting" results. LM358 is cheap and easy, but has some pits for the beginner to fall into, so if you can, avoid it.

Your VGND0 divider network consists of a 1:1 divider (R8,R9) loaded by another 1:1 divider (R11,R13) - did you take this into calculation? Otherwise the result might surprise you.

[faust1002]

In the previous design I used LF253, not LF393. But this doesn't matter anyway, because its minimum voltage supply is 6V according to the datasheet. I used a Digikey parameteric search and didn't check all details. And in the morning I had an ugly surprise.
I replaced LF253 with TS462. It seems perfect for this job - it is rail to rail, low noise op amp with a high GBW (12MHz).
Could you elaborate a little bit more on what you mean by a single rail op amp? I thought that all op amps are in some shape or form single rail, but you can't go all the way up to the voltage supply.

I agree that using op amps symbols for U3 and U5 is way better. It makes schematics not only more readable, but also easier to lay down. However, I was not able to find symbols for some op amps I used. Therefore I imported symbols from Ultra Librarian, which were, shall we say, not the highest quality.

In the latest version, the first gain stage has about 35 of gain. Then, the next stage has a variable gain set by U4. Finally, the low pass filter has also about 40dB of gain, hence R13 and R17 are connected to REF. I used Filter Wizard by AD to design this part of the circuit. For time being, I don't want to modify this part of circuit. I believe that breadboarding, measuring it and changing (improving) it if needed is the best way forward. I am a little bit sceptical about simulating it, because I am not sure how accurate results I would get.

I didn't fully get the last part of your post. I buffered virtual GND, because it was suggested by Filter Wizard. I agree that it may not be needed. But why LM358 is not a good part here?
Also, two voltage dividers are "in parallel", not "in serial". Therefore one doesn't load the other - or maybe I missed something.

[awallin]

1. I am a software developer, not hardware designer. This means that I don't necessary know what I am doing

If you want to dive into the software side then get a mini-whip antenna from ebay (30 eur), build a simple bias-T that powers the mini-whip, and get a kiwiSDR (300 eur). Figure out how to pipe the IQ samples from the kiwiSDR over e.g. zeroMQ into your dev-machine that runs GNU-radio.
This way you are decoding DCF77, MSF, TDF etc. in no time (fingers crossed...)

this paper has a mini-whip-like preamp and uses the sound-card input (192 kS/s) instead of a 'real' SDR
http://jmfriedt.free.fr/agu_dcf77.pdf

see also fig24 here:
http://caxapa.ru/thumbs/417284/Engeler_DCF77.pdf

this one has an op-amp preamp: https://www.radioeng.cz/fulltexts/2013/13_04_1211_1217.pdf

[MarkMLl]

kiwiSDR (300 eur). Figure out how to pipe the IQ samples from the kiwiSDR over e.g. zeroMQ into your dev-machine that runs GNU-radio.
This way you are decoding DCF77, MSF, TDF etc. in no time (fingers crossed...)

With what sort of latency, and how much jitter on the latency?

The whole point of this sort of project is to get accurate time. There's very little point in compromising that by introducing multiple layers of post-industrial electronics... back in the day one of my lecturers quipped that the majority of undergrad projects were "...blah...op amp...blah...PLL..." but these days the craze for throwing microcontrollers into the mix makes things worse as far as just about every type of precision is concerned.

MarkMLl

[capt bullshot]

Looking at your new schematic:

The filter circuit looks OK now, and it requires the buffered virtual ground. C11 and C13 could be connected to GND instead of REF. You've put capacitors at the output of the LM358 buffers, this should either work fine or oscillate ...

One could change the filter configuration to 3rd order Multiple Feedback and put the gain elsewhere, this would eliminate the need for the buffered virtual GND and should lower the GBW requirements on the filter OpAmps. Anyway, this is not nocessary to get the thing work, just an optimization to save an IC package (gain and filter in a 4 OpAmp package, or 2 duals).

LM358 has a "quite poor" output stage (google LM358 crossover distortion). So if the load changes from pushing to pulling current (as it does when the virtual GND is AC loaded), it will generate noticable distortions as the output stage has to "move" the current from one transistor to the other output transistor. You'll notice that as spikes appearing on that virtual GND. Capacitors as you've connected in your circuit help buffering that, but in general OpAmps get instable if a capacitive load is directly connected to their output. A 10R ... 100R resistor in series usually cures this. If C17 is a ceramic, you won't need C18 at all, same for all the other 10uF / 100nF.

Your circuit that outputs Vbias has the configuration of one divider loading another one. What's your intention with this circuit?

Edit: mixed up Sallen-Key and Multiple Feedback filter topology. Your filter is Sallen-Key with gain, suggested to move to Multiple Feedback with "+" input tied to virtual GND.

Edit 2: I'm a bit concerned about the way you've used the digital pot to control the gain. In theory, this should work for a quite wide range of gain, in practice, the parasitic capacitances and limited bandwidth of the pot might cause the OpAmp to oscillate. I'd suggest at least a smallish negative feedback cap from output to "-" here to cope with that.

Another point: A single ceramic capacitor at the power input might cause excessive ringing when the power is plugged in. An electrolytic in parallel helps to save the live of U2.

Next one: Now I see where you've put Vbias. I'd recommend to connect this node ("+") to your virtual GND as everything else, and place AC coupling between each amplifier / filter stage that provides more gain than one. In your configuration, small differences between Vbias and REF will quickly saturate the filter stages, as they are fully DC coupled. You'd need quite low offset amplifiers and Pin 5 of U4B at the very same potential as REF. AC coupling makes your life easier here.

[faust1002]

@awallin
I work on a physical layer of NR processing IQ samples in SW on a daily basis. I want to do something else, therefore I decided to design piece of hardware. Besides that spending over 300EUR to receive DCF77 signal seems like an overkill

@MarkMLl
Even the cheapest smartphone, when using LTE, is able to receive, decode and prepare a feedback for network in max 4ms. In NR this value can be even smaller, depending on a network configuration. Fair amount of processing is done by SW. DCF77 is by couple of orders of magnitude slower than LTE, therefore I wouldn't be worried about the latency introduced by SW.

@capt bullshot
First of all, thank you for some useful and detailed feedback. I really appreciate it.
I updated my design based on your comments. Changes introduced in this revision includes:
- C15 and C17 connected to GND instead of REF
- AC coupling capacitors added between gain and filter stages
- extra decoupling capacitors added for U1 and U2 (I don't like the idea of having electrolytic capacitors in my design)

I really want to move forward and finally simulate my circuit. I believe that it is good enough (for sure not perfect). That is why
- I didn't modify the filter topology
- I didn't remove 10uF capacitors, which are in parallel with 100nF
- Vbias remains as it was. I will probably never set DAC to value other than 0V
- No capacitor was added between the output and inverting input of U4B

Provided that I will not find any obvious problem in a simulation, I will design PCB (or two PCBs, one for the digital part, the other for analog) for my project and get it manufactured. Then, I will see what will oscillate and have so fun with debugging it!
Besides that there is a maker's day on 13th March in my ARC. I would be great to have some hardware ready.

[capt bullshot]

@capt bullshot
First of all, thank you for some useful and detailed feedback. I really appreciate it.
I updated my design based on your comments. Changes introduced in this revision includes:
- C15 and C17 connected to GND instead of REF
- AC coupling capacitors added between gain and filter stages
- extra decoupling capacitors added for U1 and U2 (I don't like the idea of having electrolytic capacitors in my design)

I really want to move forward and finally simulate my circuit. I believe that it is good enough (for sure not perfect). That is why
- I didn't modify the filter topology
- I didn't remove 10uF capacitors, which are in parallel with 100nF
- Vbias remains as it was. I will probably never set DAC to value other than 0V
- No capacitor was added between the output and inverting input of U4B

Provided that I will not find any obvious problem in a simulation, I will design PCB (or two PCBs, one for the digital part, the other for analog) for my project and get it manufactured. Then, I will see what will oscillate and have so fun with debugging it!
Besides that there is a maker's day on 13th March in my ARC. I would be great to have some hardware ready.

Still got some remarks:

R24, R27: place them between the LM358s output and the capacitors.

Electrolytics: adding more decoupling capacitors won't resolve the issue I mentioned. I'm cautious in particular about C1 (the input cap), that's the place where you really should add some damping. Either use a 100uF (ballpark value) electrolytic in parallel to C1, or a series circuit of a ceramic and a 0.5R (ballpark) resistor in parallel to C1. Reason behind is, when you plug in the USB cable, the parasitic inductance of the cable in conjunction with the low loss ceramic input capacitor can cause the voltage ringing up to double the nominal value for a few 10 usec. Enough to kill your regulator U2, if it isn't rated for at least 15V input voltage (didn't look that up). Adding losses (by said electrolytic) de-fuses this.

Your switches / pushbuttons are connected to short the supply. Doesn't look useful to me . Anyway, never connect a capacitor directly in parallel to a small pushbutton, that might kill the button over time.

USBDN and USBDP appear to be shorted to VCC

Otherwise, yes, fair enough, it's a good point to start. I wouldn't seperate the analog and digital part, separating breaks the recommended solid ground plane and must be handled with care.

Just one more: your Vbias circuit won't output anything else but either "near GND" or "near VCC". This is due to missing negative feedback. My recommendation still is to connect U3A, Pin 3 and U4B, Pin 5 to REF and completely skip that Vbias circuit.

[Kleinstein]

I would not use a switched mode regulator with a radio receiver - especially if one does not have much experience. The safer way is a LDO. Such switched mode regulators are the typical sources of interference.

The chosen OPs for the filters are really quite fast - this would need a really good layout and decoupling. If possible I would use a slower version - the same as for U3/U3 might be OK.

The capacitors from the output of U6A and U6B to ground are causing trouble. They would need the 100 Ohms between the OP and the capacitor. There is no real need for C21 and C25.

Even if one may not need those extra caps in the feedback at U3 / U4, it would be good to include them in the layout, so one could add them later if needed.  The TS462 is dual OP, so U4 could be actually U3B.
If at all there the capacitor in parallel to the switches should be smaller - chances are one can get away without them.

For the supply to the µC and maybe the FT232 I would include some extra series resistors of some 10 Ohms from the general supply to the chip + decoupling.

[faust1002]

Thanks guys for a prompt replies

@capt bullshot
 - resistors R25 and R28 => corrected
 - electrolytic capacitors => ceramic C2 and C3 with electrolytic versions, the capacity of C2 increased to 100uF
 - USBDM and USBDP shorted to GND =>  , corrected
 - switchbuttons => capacitors removed, resistors added
 - Vbias => U5A was supposed to act as a differential amplifier, but I must have flipped the op amp symbol upside down accidentally. Corrected

@Kleinstein
- Using LDO instead of a switched mode regulator => This version will be powered via USB and probably will sit about 10cm from my laptop. In other words, it will operate in noisy environment anymore. When I will switch to a battery powered version, I will consider your advice
- Replacing ADA4891-2 with TS462 => ADA4891-2 was suggested by AD Filter Wizard. But I will simulate a version with TSP462 instead of ADA4891-2 and if results are good enough I will replace U3 and U4 with TS464. ADA4891 has much higher slew rate, but most likely I don't need this.
- Additional resistors (R25 and R28) at the outputs of U5A and U5B added.
- I knew that TS462 was a dual op amp, but I made a mistake in the symbol designator. Thank you for pointing this out.
- The digital potentiometer I used has about 1MHz of bandwidth. Should be enough to not oscillate. If not I will have a lot of fun bodging extra caps in the negative feedback loops
- What would be the purpose of the series resistor you mentioned?