Anyone here ever tried something like this?
This is a project in the making, that has been going for a while now (mostly conceptual/planning/reality checks up till now). This is possible with current technology, but bloody expensive to pull off.....that is if you are "allowed" to buy the components (ever tried to buy radiation hardened FPGAs before?).
My initial requirements were:
- HF right up to UHF (0 - 500MHz) - all HAM modulations (including squeezing Codec2 into there)
- No decimation/mixing in hardware at all
- DSP for everything between the ADC and DAC (16-bit)
- Initial implementation HF only, but solution had to be able to go to a 500MHz modulated signal.
- and lastly, a simple digital LCD screen/touch/knobs/speaker solution to fill in the rest of the radio (preferably classy - technology without aesthetics is just not on).
The whole idea behind this is to filter and amplify your RF signal, and then directly sample the RF signal via the ADC, and everything leaving the DSP would exit through a DAC. All further processing (IF mixing, filtering, modulation, demodulation) is done digitally. Although it might look like a pointless exercise, it can be done....and I think one reason might be to separate the RF standard(s) from the hardware. If anything changes, you just update your firmware. Another reason would be to start implementing the open source Codec2 into hardware (I'm a big fan)
Now......I know it can be done in ways that are a lot easier and cheaper....not the point. I want to do it this way. My problem is running into FPGA/DSP limits for the required 10Gbps LVDS serial Iine I require for the sampled data. My initial though process went down the route of DSPs with high frequency ADC/DACs, but after eventually locating the DSPs that had the oomph to do what I needed it to do.....I discovered better ADC/DACs, and the DSPs cannot keep up anymore (the story of my life....starts to look like my 25 year old fiber home automation system - don't ask)....and the Freescale DSPs are friggin expensive.
I have now (sulking) scaled back the initial concept. I can use cheaper ADC/DACs, but I'll have to stagger them to stay within the performance limits, and I've decided that FPGA is a better route to go (the FPGA would also be better at regulating the staggered ADC/DAC clocks with minimal jitter). I am now also prepared to decimate in hardware to get the I/Q signals (sulk).
Have anyone here ever done something similar to this? Experimental/commercial/professional, I don't care. If you have any guidance, input, or ideas as far as is possible on component selection, possible architectures. I'll appreciate it.
This was hard work. Opening a can of Windhoek draught now........ (what?, no icon for beer? this is just not on in the engineering world)
Regards
Johan