Help me improve this power splitter

[tszaboo]

So I made a passive power splitter. It's part of my monthly JLCPCB designs, that I do for fun/learning. Trying new things.
It's made on the JLCPCB 04161H-7628 stackup, 4 layers with 2 grounds (and some stuff on the bottom side)
Schematic is 3x 16.5 Ohm nominal (16Ohm actual) resistors in a Y connection.

Now the bad part:
I measured it with a Megiq 440 VNA. The nominal gain should be -6dB, I got -6.5dB
It's relatively flat (+/- 0.5dB) up until 2.7GHz, where at 3.2GHz it drops to -9dB.
I'm trying to figure out what's the reason for this low bandwidth limit.
I have some suspects, but I wanted to ask your expert opinion before making a bunch more prototypes.
Theories:
-trash quality Aliexpress SMA connectors
-the middle of the Y connection isn't 50Ohm, so the separation should be different for the coplanar wavegide to match it
-0603 resistors are too big, should be 0402
-Something something VNA isn't set up correctly. I calibrated it with a Female SMA kit with a calibration quality adapter. The cal kit is~400 EUR.
-SMA end launch transition is bad
-Since I only have a 2 port VNA, I terminated the other SMA with 50 Ohm, something is up with this. Maybe I need to have a cable here.
What do you think? Any other theory?

[mankan]

I'm no expert in this but I have some experience and a few comments, questions and tips anyway.

6.5dB, check any commercial splitter and they state IL of 0.2-0-5dB depending on make and model, that means in addition to the theoretical 6dB. So I would not worry about this.

What is on the bottom side? It ought not to matter but I'm curious.

VNA measurement setup: you should be fine. A normal thru calibration is all you need for this, as long you do not want to measure phase imbalance between the ports.

Resistor size: yes, smaller would be better. Some say you should mount SMD resistors upside down to reduce parasitic inductance. I have not tried this myself.

Board size, I would try to make the board much smaller. There is always losses in the PCB.

And finally, I guess you have multiple boards? Mount two 0 Ohm resistors or small capacitors (100pF-1 or 10nF) and cut off the third trace close to the middle and measure the loss, this ought to give an idea of the PCB losses.

[RFDx]

I measured it with a Megiq 440 VNA. The nominal gain should be -6dB, I got -6.5dB
It's relatively flat (+/- 0.5dB) up until 2.7GHz, where at 3.2GHz it drops to -9dB.
I'm trying to figure out what's the reason for this low bandwidth limit.

The leading cause would be the 3 short transmission lines between the resistors and the star point in the middle. Try to eliminate these. The return loss for any port at high frequencies should also be quite bad. A few other things that chop in are the middle pin of the SMA edge connector and the resistors being wider than the 50 Ohm transmission lines, PCB material not made for such high frequencies, probably low quality SMA connectors.

[EggertEnjoyer123]

Can you measure the S11 too?
Use smaller resistors and try to stick them as closely together as possible.

[Odysseus]

You can also reduce losses by increasing the thickness of your dielectric and/or using microstrip instead of GCPW. This reduces both the dielectric loss with lower field strength and copper losses with reduced current density. This is analogous to using a thicker, lower loss, RF cable. Even though the materials are the same, the loss will improve.

The thicker dielectric has a secondary benefit of a trace width much closer in size to the resistor and connector pads.

[radiolistener]

Now the bad part:
I measured it with a Megiq 440 VNA. The nominal gain should be -6dB, I got -6.5dB
It's relatively flat (+/- 0.5dB) up until 2.7GHz, where at 3.2GHz it drops to -9dB.

Your splitter has a mask over transmission line, it's material properties at GHz band is unstable and cannot be predicted, it leads to some impedance mismatch and radiation loss. Also it leads to additional signal loss due to heating mask material. Try to design a new PCB with no mask over transmission lines and no soldering (just clean copper). Also check PCB material properties and size it may be a little different than one used for transmission line geometry calculation.

Also transmission line geometry looks not homogeneous. Vias placed too far and that distance is changed at the middle of transmission line path, which probably cause some impedance mismatch and forms some kind of resonator which can leads to issues at higher GHz frequencies. Isn't it?

[tszaboo]

I'm no expert in this but I have some experience and a few comments, questions and tips anyway.

6.5dB, check any commercial splitter and they state IL of 0.2-0-5dB depending on make and model, that means in addition to the theoretical 6dB. So I would not worry about this.

What is on the bottom side? It ought not to matter but I'm curious.

VNA measurement setup: you should be fine. A normal thru calibration is all you need for this, as long you do not want to measure phase imbalance between the ports.

Resistor size: yes, smaller would be better. Some say you should mount SMD resistors upside down to reduce parasitic inductance. I have not tried this myself.

Board size, I would try to make the board much smaller. There is always losses in the PCB.

And finally, I guess you have multiple boards? Mount two 0 Ohm resistors or small capacitors (100pF-1 or 10nF) and cut off the third trace close to the middle and measure the loss, this ought to give an idea of the PCB losses.

Bottom side picture is attached. It's a bunch of testpoints for VNA measurements for UFL and 0603 components.
I'm not too worried by the -/- 0.5dB, I think that's normal.
The idea to measure the transmission line is good, I'll collect some components and measure it tomorrow.

You can also reduce losses by increasing the thickness of your dielectric and/or using microstrip instead of GCPW. This reduces both the dielectric loss with lower field strength and copper losses with reduced current density. This is analogous to using a thicker, lower loss, RF cable. Even though the materials are the same, the loss will improve.

The thicker dielectric has a secondary benefit of a trace width much closer in size to the resistor and connector pads.

I didn't think about this. My RF work is usually routing a signal from a microcontroller or modem to an antenna, and matching it. CPW is good there for layout reasons, and you don't worry about or notice 1dB difference.

Can you measure the S11 too?
Use smaller resistors and try to stick them as closely together as possible.

I did, see attached. It's -10dB or less up to the same 2.9GHz frequency, and it's only really 50 Ohm at 1120MHz.
I don't remember why I used 0603 instead of 0402, I always use 0402 for RF. Probably I wanted it to handle more power. Or I recently measured an RF attenuator which was using 0603, and it worked OK until 4GHz.

Now the bad part:
I measured it with a Megiq 440 VNA. The nominal gain should be -6dB, I got -6.5dB
It's relatively flat (+/- 0.5dB) up until 2.7GHz, where at 3.2GHz it drops to -9dB.

Your splitter has a mask over transmission line, it's material properties at GHz band is unstable and cannot be predicted, it leads to some impedance mismatch and radiation loss. Also it leads to additional signal loss due to heating mask material. Try to design a new PCB with no mask over transmission lines and no soldering (just clean copper). Also check PCB material properties and size it may be a little different than one used for transmission line geometry calculation.

From what I understand, this is only an issue at 10+GHz frequencies. I've never seen measurement results comparing boards with and without solder mask though. Do you have some reference material about this?

Also transmission line geometry looks not homogeneous. Vias placed too far and that distance is changed at the middle of transmission line path, which probably cause some impedance mismatch and forms some kind of resonator which can leads to issues at higher GHz frequencies. Isn't it?

What you write is true, but I don't think it's applicable for such low frequencies. Here are some measurement results, where they move the space between the via and the transmission line. They call this "VL" I see a flat trace up to 15GHz in those measurements for VL=2.7mm. My VL is 1mm and 1.5mm.

https://resources.altium.com/p/altium-live-question-digital-signals-grounded-coplanar-waveguide

[Kalvin]

Have you checked this video "Should You Remove Ground Below an SMA Connector?" from Altium Academy:
https://youtu.be/qSX7Zs0ai50?t=156
The video will give some hints how to tweak the ground layers and the SMA center pin pad so that its impedance will be closer to 50 ohms.

[Kalvin]

There is another project here at EEVblog which is about designing a good match to an SMA connector:

https://www.eevblog.com/forum/rf-microwave/sma-connector-footprint-design-project/

[tszaboo]

Have you checked this video "Should You Remove Ground Below an SMA Connector?" from Altium Academy:
https://youtu.be/qSX7Zs0ai50?t=156
The video will give some hints how to tweak the ground layers and the SMA center pin pad so that its impedance will be closer to 50 ohms.

Right, this stackup is different from what I usually use, that has 0.4mm between Top-L1.
So a quick calculation would be about 0.6pF extra capacitance between the pad and L1 compared to the CPW. Impedance is about 28 Ohm.
I made a very quick simulation based on this. Spice, because I don't have a field solver, no matter how much I keep negging my boss to spend 10K on software.

0.6pF on these 3 ports is -2dB at 4GHz. I think this is the reason for most of the attenuation.

[Gerhard_dk4xp]

Right, this stackup is different from what I usually use, that has 0.4mm between Top-L1.
So a quick calculation would be about 0.6pF extra capacitance between the pad and L1 compared to the CPW. Impedance is about 28 Ohm.
I made a very quick simulation based on this. Spice, because I don't have a field solver, no matter how much I keep negging my boss to spend 10K on software.

0.6pF on these 3 ports is -2dB at 4GHz. I think this is the reason for most of the attenuation.

You could use free Sonnet-lite as the field solver.
<     https://www.sonnetsoftware.com/products/lite/      >

the pic is the tdr trace of the board in the other thread, where the
test line is between the 4 LMX2594 synthesizers. The 2 transitions are
at division 7 & 8 on the time axis. They are very slightly overcompensated
but MUCH better than than the deep capacitive notches of the first try.

The impedance of the line itself is slightly higher than 50 Ohm
(about a pixel on the screen between the tiny horns).  10 mil instead
of the correct 11.5 mil for the standard JLCPCB 4 layer process.

Gerhard
 

[BigBoss]

Since you intend to divide/combine 2 signals, why don't you use Wilkinson Power Divider/Combiner ?
The Bandwidth will be relatively lower but it's always possible make it having wider bandwidth.
Also, you're using FR4 substrate ( guessing ) and this substrate is not appropriate at all for beyond 1.5-2 GHz.

[tszaboo]

Since you intend to divide/combine 2 signals, why don't you use Wilkinson Power Divider/Combiner ?
The Bandwidth will be relatively lower but it's always possible make it having wider bandwidth.
Also, you're using FR4 substrate ( guessing ) and this substrate is not appropriate at all for beyond 1.5-2 GHz.

Because I don't know how to design a Wilkinson Power Divider/Combiner.
And I don't know who told you that FR4 is "not appropriate at all". It's regularly used up to 10GHz, see this:
https://www.eevblog.com/forum/rf-microwave/9-10ghz-and-fr4/msg1469066/#msg1469066

You could use free Sonnet-lite as the field solver.

Do you know any friendly introduction to it?

[Kean]

Also, you're using FR4 substrate ( guessing ) and this substrate is not appropriate at all for beyond 1.5-2 GHz.

What about the billions of WiFi devices using FR4 at 2.4GHz, with many also supporting 5-6GHz?

[BigBoss]

Also, you're using FR4 substrate ( guessing ) and this substrate is not appropriate at all for beyond 1.5-2 GHz.

What about the billions of WiFi devices using FR4 at 2.4GHz, with many also supporting 5-6GHz?

No Mister,
FR-4 is never used in critical applications @ 2GHz or beyond. If you look at its characteristics', you will see Di-Electric Coefficient is not stable by temperature and time and lot by lot.
They use FR-4 because they have to reduce to manufacturing cost by suffering performance. If you're agree few dB more loss, ok, you can but not in critical applications.
FR-4 Manufacturers announce different specifications for their FR-4 and since you don't know which brand has been used in your project, it's always possible to face to face a surprise while measurements.
I'm talking about "professional engineering", not DIY tryouts.

[BigBoss]

Because I don't know how to design a Wilkinson Power Divider/Combiner.
And I don't know who told you that FR4 is "not appropriate at all". It's regularly used up to 10GHz, see this:

My 35 Years of RF/Microwave Engineering Experience told me.
When you design a combiner, you measure the first sample then it looks good then second one may become crap.
If it was so, serious RF/Microwave Measurement Equipment Manufacturers (Spectrum Analywer, VNA, RF Signal Generator etc.) would use FR-4 due to its cost but they can't.
I design a Wilkinson Divider for you if you wish.

[G0HZU]

Some good comments already, but the other obvious issue is that you have used ordinary 16.5R 0603 SMD resistors in the star configuration. You should get much better performance if you used the three x 50R delta configuration if you want to stick with 0603 package resistors.

For a one off design use 2x 100R in parallel to get the 50R resistances used in the delta configuration. Fit one 100R resistor directly on top of the other for a one-off design like this. In this case, the delta configuration will easily outperform the star format. I've done this stuff in the past, and it's obvious that the delta will be the best choice with 0603 resistors. 100R 0603 packaged SMD resistors are usually very broadband in nature.

I used Rogers 4003C material 0.02" thick to get a microstrip width that was the same as the resistors and placed the delta as tightly as possible. My aim back then was to make a metrology grade splitter to help me calibrate my old HP 8405A vector voltmeter. It only needed to work up to 1GHz, but it actually worked really well (in terms of VSWR and insertion loss) up to beyond 3GHz.

I think I've posted this plot a couple of times in the past, but see below for my old homebrew splitter that I designed for my HP 8405A VVM.

I've measured it up to 3GHz here but it only had to work well to 1GHz. You can see that this splitter does perform extremely well. I also tried to get sub 1 degree phase imbalance up to 1GHz and easily achieved this. I did select on test all the 100R resistors using a 6.5 digit DMM in 4 wire mode to cherry pick resistors that gave as close to 50R as possible. In theory each port should be -6.02dB and because I matched the resistors, this was achieved at the bottom end of the frequency range. It also gave really low VSWR at lower frequencies.

I tested it below using an Agilent E5071B 4 port VNA with a N4431-60006 (13.5GHz) 4 port Ecal module so the results below should be quite representative of the real performance..

[Gerhard_dk4xp]

You could use free Sonnet-lite as the field solver.

Do you know any friendly introduction to it?

short search:

<    https://www.youtube.com/@sonnetsoftware  >

But, I don't use it myself. (yet)

[tszaboo]

And finally, I guess you have multiple boards? Mount two 0 Ohm resistors or small capacitors (100pF-1 or 10nF) and cut off the third trace close to the middle and measure the loss, this ought to give an idea of the PCB losses.

So I finally put together this and had time to measure it. Third transmission line removed, shorted to GND, no resistors, but a piece of wire. Through measurement with VNA.
Looking at the S12, we see similar -0.5dB performance up to the same 2.6GHz, where it drops to -6dB at 3.6GHz.
I'll also attempt a TDR measurement, as that supposed to tell us for a transmission line where exactly it is not 50 Ohm.

[Randy222]

Isn't the Wilkinson kinda the goto design for power splitting / combining?

[BigBoss]

A Wilkinson Based Divider/Combiner for 2.7GHz.

[tszaboo]

OK, so further calculations. The main issue is that my SMA connector is not 50Ohm, so let's fix that, and a few other things.
I'm just going to brain dump here, hopefully someone follows 

1) The idea is that the board is changed, so the SMA solder pin is calculated as a 50Ohm microstrip. The SMA pad is 0.9mm * 4.1mm
https://resources.altium.com/p/sma-edge-connector-transitions-rf-pcb
2) Changing the resistors to 0402 because IDK why I was using 0603 in the first place. The pad size is 0.6mm*0.6mm of these parts.
3) The transmission line therefore should be 0.6mm wide. I usually do this with 2x0.2mm prepreg between L1 and L2, with 0.2mm spacing CPW, but we don't have this stackup, so recalculate.
4) Altium hates when things are not 45 or 90 degrees placed, so I'm going to do that.
5) Remove soldermask, probably doesn't matter
6) Try delta configuration as well
7) Move resistors closer.
8 ) Smaller PCB
9) Use Vishay FC series 50 Ohm resistors for the delta configuration based on G0HZU's recommendation Nah, jokes aside, I have selected before 50 Ohm resistors that are about 0.1nH inductive.

JLC doesn't offer 2L boards with impedance control, so I excluded that.
On 4L stackup that they call JLC04161H-7628(Standard) there isn't a solution for CPW which is 0.6mm wide. Microstrip between L1-L2 is 0.35mm, CPW between L1-L3 with 0.2mm spacing is 0.86mm. The core is too thick. So we need more layers. That's fine, with the specials they have continuously, this is still 4 EUR shipped.
After playing with the impedance calculator, this is what I came up with. L2 needs to be empty below the CPW. 6 layer is wasteful I know, but I consider this constraint driven design.

[fourfathom]

Isn't the Wilkinson kinda the goto design for power splitting / combining?

It's great for semi-narrowband applications, but if you want a flat response DC-to-Daylight splitter you go with resistors.

Wilkinson, and the transformer hybrid splitter, have lower loss than the resistive splitter.  The hybrid can cover a few decades of frequency.

[cncjerry]

G0HZU said it first, I think, to use delta vs star, and someone said to eliminate those short links in the center.  If you look in a standard minicircuits resistive combiner/splitter you generally will see a delta config with 49.9ohm matched resistors. The delta config gets rid of those short links as well.  I also don't think you need those lengthy runs from the connectors.  I saw some code on the web where it will compute the stripline impedance based on width, length, board materials and thickness.

Jerry

[tszaboo]

G0HZU said it first, I think, to use delta vs star, and someone said to eliminate those short links in the center.  If you look in a standard minicircuits resistive combiner/splitter you generally will see a delta config with 49.9ohm matched resistors. The delta config gets rid of those short links as well.  I also don't think you need those lengthy runs from the connectors.  I saw some code on the web where it will compute the stripline impedance based on width, length, board materials and thickness.

Jerry

I'm using the JLC's calculator, because the info available on the used prepregs and cores is questionable at best. It has definitions like "3313" which is a designator for an Isola prepreg with a DK of 3.8, while on their website it's 4.1. Altium's built in Simbeor based calculation gives 0.03mm difference on the track width. It's actually hidden in the stackup view's impedance tab properties panel. Like deep down in the software. It can surprisingly calculate with a lot of properties, I've never dug down so much in Altium for controlled impedance, it's also new for Altium 23.
Anyway, this is how the board looks like now, criticize. L2 is empty below the tracks.