After some thinking, this is not extraordinary difficult to implement, given that there are external relays and directional coupler/reflection bridge available, and the two ADF4351s can maintain sufficiently stable frequency.
It's a PLL, so once it is locked, the frequency ratio with regard to the xtal will be perfectly stabe. However, you need to give it enough time to settle after changing the frequency. The remaning "instabilities" are rather phase noise, eventually. The ADF4351 isn't that bad, though.
Since the tracking generator is sending a sinusoidal signal,
According to the datasheet (see attachment) It is not. So be prepared for mixing products having frequencies n * f
IF (where n is an integer). I do not see a problem, though, to get rid of the IF harmonics by filtering. For instance, the frequency response of a one-period rectangular window (simple moving average filter) has zeros at all harmonics. If multiple periods are collect, then even more sophisticated window/filter can be used.
the RX can use whatever shifted IF and ADC sample clock that is suitable. For example the RX could use 12kHz IF offset, thus the ADC sample-clock needs to be at least 24kHz, preferably more like 4x, which makes signal detector quite simple. Since the ADC sample-rate can now be reduced from 1Ms/s down to 48Ks/s, ADC can be kept running continuously between different measurements, STM32F103 can process the samples in real-time, and the phase information between tracking generator and the LO can be preserved -> it is quite possible to implement a VNA with this hardware, external directional coupler/reflection bridge and external signal relays.
Likely you still want to run the ADC as fast as possible, in order that you can collect enough samples for suffient processing gain, w/o slowing down the measurements too much.
I also tried to find ADC characteristics for the STM32, like SINAD, SFDR, INL, DNL, etc. But I did not find any numbers
Strange. For other serious ADCs I'm used to find these numbers and corresponding figures in the datasheets.
Btw, I also wonder, which of the
STM32F103 models is it? And what's the clock speed?
is there a schematic of LTDZ available somewhere for download? My search was not successful.
I'm impressed with your desire, because working with ADC @ 1 MS/s on STM32F103 is a real headache
Can you elaborate where exactly you did experience problems? One interrupt per sample is of course a no-go. But isn't it possible to setup free-running ADC with DMA (possibly with double-buffering if limited real-time processing were desired), steaming the converted data at the maximum sampling rate to memory w/o CPU intervention?