Low gain on wideband BFP640ESD NPN Transistor Amplifier

[cs256]

Hello all,

Longtime lurker first time poster.

I recently designed and built a wideband NPN RF inductively coupled class-A amplifier.   I designed it to use a BFP640ESD NPN transistor (https://www.infineon.com/assets/row/public/documents/24/49/infineon-bfp640esd-datasheet-en.pdf) and would like it to operate from a few hundred MHz up to 3-ish GHz.  I have a decent amount of experience with building RF circuits using MMICs and doing antenna design, but I wanted to reaffirm my skills by designing an LNA using discrete components.

Before building I simulated my design in LTSpice (schematic attached in a photo with results).

I didn't do input and output impedance matching because the match seemed good enough without it (supported by simulations) and I wanted it to work over a very wideband.  I intended to use it with some hybrid couplers that would snub out the reflections that would be present.

The capacitors I am using are some left over Johanson Dielectric QSCP251Q8R2C1GV001T (https://www.johansondielectrics.com/search/pn-pdf/QSCP251Q8R2C1GV001T/) from another project.

The inductors I am using are MuRata LQW18AN series wire-wound inductors in 2.2 nH and 10 nH varieties (https://search.murata.co.jp/Ceramy/image/img/P02/JELF243A-0024.pdf) I bought.

The 50 Ohm resistor is an RF specific precision terminating resistor I had (I can find a specific spec sheet if you think that is the issue), all others are standard thin film components from Vishay-Dale.

All components are 0603 and on a JLCPCB board I manufactured.  I have a thru-line on the board affirming the U.FL connector launches and transmission line characteristics.  The 2.5 cm thru line has around 2 dB of loss at 3 GHz.  I am assuming this is mostly down to the U.FLs not being great and not paying for precision impedance trimming on the boards.

The board layout and source schematic is included in the 2 KiCad screenshots.

I expect maybe 8-12 dB gain (based on simulation and hand calcs) from this setup.  When I place the device under test I yield 6 or so dB of loss according to the spectrum analyzer.

I would love it if someone could check my work and see if there is anything that stands out as being obviously wrong about this setup.  I will happily provide any more information you might want.

Thanks in advance for any and all thoughts and responses.  I really appreciate it.

All the best,

cs256

[rf-fil]

The components are different values on the LTSpice diagram and the actual schematic.

BFP640 is a 45GHz transistor. It is very easy to turn it into an oscillator at some high GHz frequency that you might not easily notice.

LTSpice is not the best tool for this type of design. You need to simulate the component parasitics. That's easiest done by using the S-parameter models for all passive components. You can get those from the suppliers, e.g. Murata "Simsurfing" tool. The layout is also worth simulating. I'd model it as sections of microstrip. The usual tools for properly designing this type of circuit are ADS or AWR / Microwave Office.

When you simulate the amp, also check for stability. It should be unconditionally stable, so K > 1 across the whole band.

[KE5FX]

The usual tools for properly designing this type of circuit are ADS or AWR / Microwave Office.

That, or a microscope.

Agreed that oscillation seems like a potential reason for the loss.  Also agreed that the 45 GHz fT is not going to make life any easier.  Component and board parasitics will dominate any design based on that sort of part.  Is the DC current drain what you expect?  Does it (or the gain) seem to vary when you move your hand near the PCB? 

I don't have KiCad installed, but the diagram you posted doesn't show ground fill or any vias.  Could be worth posting a photo of both sides of the actual PCB.

[cs256]

Firstly, thank you for your responses.  I appreciate it.

TL;DR it was oscillating at 5.8 GHz according to a nicer SA I just gained access to.

Thanks for pointing out the difference in component values between the two.  I forgot to mention that.  The KiCad schematic shows values for a lower frequency configuration.  That configuration worked up to 500 MHz or so (as expected based on the self resonant frequencies of the components used).  It was a bit low on gain, but not too much.  If memory serves it had about 8dB of gain in that configuration.

I would love to use ADS for this, I am experienced with it from previous jobs I have had where I used it for microwave simulation work similar to this.  Unfortunately I don't have access to a license for it right now and when I looked I didn't see an inexpensive way to get access to it for hobby use.  I will look again at ADS and look at microwave office to see if I can get access to that.  Thanks for mentioning them.

That said, I was thinking it was parasitics so I went and added in some parallel elements into the LTSpice schematic.  I don't remember the actual values I added but they were in excess of what I would normally expect from the passive devices (back calculated from the self resonant frequency of the components, then increased above it for factor of safety).  I saw a small gain hit but nothing too alarming.

The KiCad schematic does have vias and a ground plane it is hard to see but I already validated the connections are all good and match the schematic.

The current draw is as expected. The only real return path is through the drain other than the decoupling cap on the top after the 50 ohm resistor.  It draws 20-30 mA.  It does not get hot or anything.  I have placed my hand and other implements all around it as part of my testing routine and did not experience anything abnormal.

I have attached a photo of the real board to this post.  The back is solid green solder mask with a ground fill, so not much to look at.  Sorry it is a bit blurry, it is the best one I have right now.

Given the mention of oscillation I gained access to a higher frequency Spectrum Analyzer today and it does look like it was oscillating at 5.8ish GHz.  I was thinking about trying to cut the trace underneath the transistor and reroute it on top, as that seems like the first most likely cause of issues.

Any advice beyond that on how to rework the PCB to get it to stop would be amazing!

Thanks again everyone!

[KE5FX]

Man, that's a tough one.  Getting a 45 GHz transistor working on a hunk of cut-rate Chinese FR-4... 

This may just be an impossible task.  The fact that you're seeing multiple dB of losses over a couple of centimeters at 3 GHz suggests that the series and/or parallel impedances of your traces (including component footprints!) is far from what you were hoping for.  There will also be crosstalk all over the place, imposing effectively random losses and phase shifts at frequencies where the transistor has a lot of gain. 

I posted the link to my dead-bug amplifier as a joke, but that may be the only way to get something like this working without microwave-grade dielectrics, much smaller components, and painstaking simulation with death-defyingly expensive tools.  Hopefully others will have some more productive, actionable input, but me... I got nothin'.

[cs256]

I will keep trying for a while longer and see what I can do.

Thanks for linking your amplifier.  It looks nice, I am not against dead-bugging it to see what I can do.

Infineon does seem to spec this transistor for use as an LNA for GNSS at L1, installing it on an FR4 PCB in their application note.  I have been fiddling around with it on the board, doing some rework and got it up to 10 or 12 dB of gain at 1 GHz and 0dB of gain at 2.4GHz.

I was assuming the loss was mostly coming from the (not great) U.FL connectors I was using.  At X-band I have seen, fairly commonly a few dB of loss from unideal coax launches, and as you can see in my KiCad screenshot, there wasn't a whole lot of engineering that went into designing the U.FL launch I am using.

https://www.infineon.com/assets/row/public/documents/24/42/infineon-design-guide-for-low-noise-transistors-in-gnss-applicationnotes-en.pdf?fileId=8ac78c8c7e7124d1017f02277f936c32


I really would like it to work at 2.4 GHz because I have a copy of the design implemented in a quadrature balanced amplifier configuration, which I would like to profile and see functioning, unfortunately the couplers are narrow band.

Thanks for your help KE5FX!

[EggertEnjoyer123]

This is never going to work because there is too much inductance from the emitter to ground.

You MUST put the via inside ground pad to get any appreciable gain out of these at 3 GHz. Any inductance gets multiplied by the gain of the transistor, so even a tiny trace between the via and the emitter pad will cause issues. For your design, the inductance seen on the emitter is much higher (due to the comparatively long trace and the parasitic inductance of the capacitor). If you put the via right on the emitter pad, your inductance will be much lower. You can try adding 1nH inductance to the emitter and you'll see the performance drastically drop.

Also these transistors are always unstable and require some form of loss to make unconditionally stable. You should use ADS (or Qucs if you can't afford it) to design it. You can get the S parameter files from the manufacturer websites too. Also, a ferrite bead (BLM15GG471 specifically) might be useful as a wideband inductor.

[ArgyllGargoyle]

+1 on the ferrite bead for stability- if you can shoehorn one on the base it might help. In fact, for stability, fr4 loss is helpful here.

[RadioNerd]

Such a feedback arrangement with 0603=large discrete components with these transistors is just not going to work very well. I would strongly recommend to start with a simple common emitter amplifier configuration and very low parasitic inductance layout using plenty of GND vias directly at both emitter pins (there are two for a reason ). You will have to sacrifice some gain flatness but it will make life a lot easier (but still not easy, though).
NXP has quite a few application notes of working designs with such >40GHz ft RF transistors. As an example AN11448: https://www.nxp.com/docs/en/application-note/AN11448.pdf but there are many other narrow and wideband design examples if you look on their website

PS: Another comment: At this stage the use of fancy "RF-grade" components is optimizing in the wrong place...
1) Layout matters more than the properties of the passive components
2) for broadband designs, the use of slightly lossy components (X5R ceramics, low-Q non-wirewound inductors or even ferrite beads as mentioned above) is often even preferable. It reduces the tendency of the circuit to oscillate and smooths out any sharp parasitic resonances of the bias network that might result in nasty gain dips.
3) The frequency range in which these fancy RF grade capacitors and resistors start to make sense is beyond 6 GHz in my opinion.

[KE5FX]

Purely resistive loss can be advantageous, whether in components or PCB material.  Losses associated with uncontrolled, unspecified, and unknown phase shift may not be so helpful.  If the material Er isn't what you thought it was, then that's what you have.  

Mismatches radiate, radiation leads to crosstalk, crosstalk leads to oscillation.

[ArgyllGargoyle]

Fair point. Still, I wouldn’t feel compelled to build it on Roger’s. If you haven’t perused the webpage of Matjaz Vidmar, S53MV, it’s got a lot of great info on practical use of rf/mw devices. He points out that circuits like these benefit from a small, rectangular shielded enclosure, sometimes using absorber foam. If you don’t care as much about noise figure, a resistor on the base should help stability as well. The ferrite bead approach seeks to get high freq loss without in-band loss/noise

[KE5FX]

Yeah, Matjaz is my personal patron saint.   The usual prayers stop working at 40 GHz+, though.  Then it's time to draw a pentagram on the board.

[cs256]

Hello everyone,

Sorry it has been a few days, I have traveling for the holidays and catching up on some other work.

I tried a few more times to get things to work earlier this week.  I ended up getting it up to about 1 or 2 dB gain overall out of it by fiddling around with the layout.

I have to order more boards and DigiKey parts this week anyway for another project I need to get done so I was planning on throwing another layout for this project on the order.

Unfortunately I cannot afford Rogers (wish I could) but since shipping is the real killer with JLC these days, I can grab another FR4 board.

I reworked all the math and checked with multiple calculators to ensure the trace impedance is correct.  I switched to CPW from Microstrip, which will hopefully improve things.  I have also switched to using 0402 passives.

I made a new layout based on the application note linked below, which was done on (probably nicer) FR4 for their test.  I probably just should have done that from the beginning.  The layout (including a few other test devices) is attached in the photos.

https://www.infineon.com/assets/row/public/documents/24/42/infineon-design-guide-for-low-noise-transistors-in-sdars-active-antenna-lna-applicationnotes-en.pdf\

If you don't mind, let me know if you have any additional advice for this layout before I order it.  All your advice thus far has been great, and it all makes sense.  Thanks.  I will get some wire wound and ferrite bead inductors for it and try both.  I will also buy a few different transistors (some with lower frequency specs) in the same form factor to try out.

Hopefully I can get this working.

Thanks again for the feedback, all the best!

[ArgyllGargoyle]

You can lower the emitter inductance a bit more if you add a few more vias on those two emitter pins. If it were me, I’d add a series landpattern on the base - you could put a small resistor or a fb there if it still oscillates. Or a 0 ohm if it doesnt

[cs256]

Thanks for the thoughts!  The app note actually mentioned that it recommends adding some inductance to the emitters in order to degenerate the transistor a bit, which make sense I suppose.  The series land pattern is a good idea, I should have thought of that.  Will do.

[KE5FX]

Remember to pay close attention not only to trace impedances but pads as well.  A 0-ohm resistor doesn't look like a 0-ohm resistor if the pads have excess capacitance to the ground plane below them.  I tend to favor 0402 and even 0201 parts for that reason.

The input and output jack center pads, for instance, are a good place to lose a lot of signal due to excess capacitive loading.

[cs256]

Hello KE5FX,

I am missing the ground keepouts below the U.FL, good thing you caught that!  Thanks a bunch.  I did switch to 0402, I could switch it to 0201, but that seems really tricky to solder.  Do you think that improvement would be really worthwhile?  All of infineon's app notes use 0402.

All the best!

[KE5FX]

Hello KE5FX,

I am missing the ground keepouts below the U.FL, good thing you caught that!  Thanks a bunch.  I did switch to 0402, I could switch it to 0201, but that seems really tricky to solder.  Do you think that improvement would be really worthwhile?  All of infineon's app notes use 0402.

All the best!

I'd stick close to the app notes, myself, but remember that the stackup matters. 

A rule of thumb is that for substrates near Er=4, 50-ohm microstrip is about twice as wide as the distance to the next ground plane.  So on (e.g.) a 4-layer board with 0.2mm of FR4 between L1 and L2 copper, the 50-ohm traces might be about 0.4 mm wide, and in that case 0402 series caps with their 0.5-mm wide pads might give you less of an impedance bump than 0603 parts.

Meanwhile, if you are working with only 2 layers on a 1.6mm thick board, your 50 ohm traces might be almost 3 mm wide. You could be tempted to go all the way to 1210 to match the capacitor's pad size to the series trace... but at the frequencies you need to cover, such a large cap is going to look inductive by itself, likely with significant capacitive coupling to parts nearby just by virtue of its physical size.  Pretty much random, in other words.  Maybe that will be OK in practice, maybe not, but it will turn your LTSpice simulation into a work of fiction along with any stability margins you might have calculated. 

I can't see the board stackup but that's something to think about.  Many features on the top layer will need to look different depending on how far away the ground plane is. 

(Personally, I don't find 0201 any harder to solder than 0402 -- I have to use a microscope either way.)

[cs256]

I can just barely solder 0402 without a microscope and really struggle with 0201 (I could get access to a microscope if I needed to) which is why I prefer not going smaller.

It looks like the app note board is using a similar 1.6mm 4 layer stack up, given the relative trace sizes.  The 0402 pad is definitely bigger than the trace, so I am just going to assume it is fine and see what happens.

I have heard that rule of thumb, it holds in my case.

After fighting with JLC support for a while I finally got a decent answer out of them on their substrate materials and (with a small up charge) selected Nan Ya NP-140F fiberglass for my PCB (https://rs.jlcpcb.com/static/file/nan-ya-np-140f-datasheet.pdf).

I calculated trace sizes according to the lower limit of permittivity, measured at 1GHz on the datasheet and called it a day.  We will see how well it performs I suppose, when I put in the order.

I will keep you posted.

As always thanks for your thoughts.

[RadioNerd]

The design looks waaaaay better now, this board is very likely going to work fine (maybe with a few tweaks of the component values)
I would not bother using Rogers substrates for a 3 GHz application on a small PCB. In this frequency range (and for a first iteration prototype) the advantages of FR4 outweigh any fraction of dB that a Rogers based PCB could potentially offer.
A simple and more convenient way to keep substrate losses to a minimum is to keep the microstrip lines to between transistor and connectors/board edges as short as possible.

PS: 0402 components will work just fine, I don't think that there is much to be gained from switching to 0201 parts in this design.

[Gerhard_dk4xp]

I second that.

ft = 45 GHz sounds impressive, but it really means  that @45 GHz, Beta is = 1.0.
I.e. the transistor is dead in the water there.

Also I found no problems with FR4, even at 10.3 GHz. A bit of loss,
but not really bad for small distances.

What does NOT work is narrow filters and Hi-Q resonant structures.
Pipe cap filters are OK. The board sees only the 50 Ohm connections.

For JLC-PCBs 4 layer elCheapo process, 50 Ohms is 11.5mil wide.
( On top layer when next layer is GND). Their web site calculator works.

SMA Center pads must be unexpectedly small, they are not easy to solder.

Gerhard  DK4XP